Datasheet

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6
©2011 Fairchild Semiconductor Corporation
FDMC8015L Rev. C1
FDMC8015L N-Channel PowerTrench
®
MOSFET
TM
Dimensional Outline and Pad Layout
B
TOP VIEW
0.10 C
0.10
C
2X
2X
PIN1
IDENT
A


KEEP OUT
AREA
(3.40)
2.37
0.45(4X)
(1.70)
2.15
(0.65)
0.42(8X)
0.70(4X)
0.65
1.95
(0.40)
4
1
8
5
NOTES:
A.EXCEPT AS NOTED, PACKAGE CONFORMS TO
JEDEC REGISTRATION MO-240 VARIATION BA..
B.DIMENSIONS ARE IN MILLIMETERS.
C.DIMENSIONS AND TOLERANCES PER
ASME Y14.5M,1994.
D.SEATING PLANE IS DEFINED BY TERMINAL TIPS ONLY
E.BODY DIMENSIONS DO NOT INCLUDE MOLD FLASH
PROTRUSIONS NOR GATEBURRS.
F.FLANGE DIMENSIONS INCLUDE INTERTERMINAL FLASH
OR PROTRUSION. INTERTERMINAL FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25MM PER SIDE.
G.IT IS RECOMMENDED TO HAVE NO TRACES OR VIA
WITHIN THE KEEP OUT AREA.
H.DRAWING FILENAME: MKT-MLP08Trev3.
I.GENERAL RADII FOR ALL CORNERS SHALL BE 0.20MM
MAX.
J.FAIRCHILD SEMICONDUCTOR.
0.10 C A B
0.05 C
BOTTOM VIEW
0.08 C
0.05
0.00
SIDE VIEW
SEATING
PLANE
0.10 C
(0.20)
8
5
1.95
0.65
0.32+0.05
4
1
(8X)
2.27+0.05
0.45+0.05
(4X)
(1.20)
0.45+0.05
(3X)
2.05+0.05
(0.40)

C
0.8MAX
RECOMMENDED LAND PATTERN
A
A