Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDMC86520DC, MOSFET

September 2012

FDMC86520DC Rev. C

www.fairchildsemi.com

FDMC86520DC N-Channel Dual Cool

PowerTrench

MOSFET

FDMC86520DC

N-Channel Dual Cool

PowerTrench

MOSFET

60 V, 40 A, 6.3 mΩ

Features

 Dual Cool

Top Side Cooling PQFN package

 Max r

DS(on)

= 6.3 mΩ at V

= 10 V, I

= 17 A

 Max r

DS(on)

= 8.7 mΩ at V

= 8 V, I

= 14.5 A

 High performance technology for extremely low r

DS(on)

 RoHS Compliant

General Description

This N-Channel MOSFET is produced using Fairchild

Semiconductor’s advanced PowerTrench

process.

Advancements in both silicon and Dual Cool

package

technologies have been combined to offer the lowest r

DS(on)

while maintaining excellent switching performance by extremely

low Junction-to-Ambient thermal resistance.

Applications

 Primary DC-DC Switch

 Motor Bridge Switch

 Synchronous Rectifier

Top

Power 33

Bottom

Pin 1

MOSFET Maximum Ratings T

= 25 °C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage 60 V

Gate to Source Voltage ±20 V

Drain Current -Continuous T

= 25 °C 40

A -Continuous T

= 25 °C (Note 1a) 17

-Pulsed 80

Single Pulse Avalanche Energy (Note 3) 128 mJ

Power Dissipation T

= 25 °C 73

Power Dissipation T

= 25 °C (Note 1a) 3.0

, T

STG

Operating and Storage Junction Temperature Range -55 to + 150 °C

θJC

Thermal Resistance, Junction to Case (Top Source) 4.2

°C/W

θJC

Thermal Resistance, Junction to Case (Bottom Drain) 1.7

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 42

θJA

Thermal Resistance, Junction to Ambient (Note 1b) 105

θJA

Thermal Resistance, Junction to Ambient (Note 1i) 17

θJA

Thermal Resistance, Junction to Ambient (Note 1j) 26

θJA

Thermal Resistance, Junction to Ambient (Note 1k) 12

Device Marking Device Package Reel Size Tape Width Quantity

86520 FDMC86520DC Dual Cool

Power 33 13’’ 12 mm 3000 units

Summary of content (8 pages)

PAGE 1
FDMC86520DC N-Channel Dual CoolTM PowerTrench® MOSFET 60 V, 40 A, 6.3 mΩ Features Dual Cool TM General Description Top Side Cooling PQFN package This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench® process. Advancements in both silicon and Dual CoolTM package technologies have been combined to offer the lowest rDS(on) while maintaining excellent switching performance by extremely low Junction-to-Ambient thermal resistance. Max rDS(on) = 6.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 48 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA 4.
PAGE 3
RθJC Thermal Resistance, Junction to Case (Top Source) 4.2 RθJC Thermal Resistance, Junction to Case (Bottom Drain) 1.
PAGE 4
5 VGS = 10 V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) 80 VGS = 7 V VGS = 8 V 60 VGS = 6.5 V 40 20 VGS = 6 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0 1 2 3 4 VGS = 6 V 4 VGS = 6.5 V 3 VGS = 7 V 2 1 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 5 VGS = 8 V 0 20 Figure 1. On-Region Characteristics 60 80 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 25 ID = 17 A VGS = 10 V rDS(on), DRAIN TO 1.6 1.4 1.2 1.0 0.8 0.
PAGE 5
10000 VDD = 30 V ID = 17 A Ciss 8 VDD = 20 V VDD = 40 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 6 4 1000 2 Coss 100 10 f = 1 MHz VGS = 0 V 0 0 5 10 15 20 25 30 Figure 7. Gate Charge Characteristics 60 90 ID, DRAIN CURRENT (A) TJ = 25 oC 10 TJ = 100 oC TJ = 125 oC 1 0.01 0.1 VGS = 10 V 60 VGS = 8 V 30 o Limited by Package 1 10 0 25 100 50 RθJC = 1.7 C/W 75 100 125 150 o TC, CASE TEMPERATURE ( C) tAV, TIME IN AVALANCHE (ms) Figure 9.
PAGE 6
2 DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 105 C/W 0.01 0.003 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve ©2012 Fairchild Semiconductor Corporation FDMC86520DC Rev. C 6 www.fairchildsemi.
PAGE 7
FDMC86520DC N-Channel Dual CoolTM PowerTrench® MOSFET Dimensional Outline and Pad Layout ©2012 Fairchild Semiconductor Corporation FDMC86520DC Rev. C 7 www.fairchildsemi.
PAGE 8
tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.