Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDMS7580, MOSFET

December 2009

FDMS7580 Rev.C

www.fairchildsemi.com

FDMS7580 N-Channel Power Trench

MOSFET

FDMS7580

N-Channel Power Trench

MOSFET

25 V, 7.5 mΩ

Features

 Max r

DS(on)

= 7.5 mΩ at V

= 10 V, I

= 15 A

 Max r

DS(on)

= 11.1 mΩ at V

= 4.5 V, I

= 12 A

 Advanced Package and Silicon combination for low r

DS(on)

and high efficiency

 Next generation enhanced body diode technology, engineered

for soft recovery

 MSL1 robust package design

 100% UIL tested

 RoHS Compliant

General Description

This N-Channel MOSFET has been designed specifically to

improve the overall efficiency and to minimize switch node

ringing of DC/DC converters using either synchronous or

conventional switching PWM controllers. It has been optimized

for low gate charge, low r

DS(on),

fast switching speed and body

diode reverse recovery performance.

Applications

 Control MOSFET for Synchronous Buck Converters

 Notebook

 Server

 Telecomm

 High Efficiency DC-DC Switch Mode Power Supplies

Power 56

Pin 1

Bottom

Top

MOSFET Maximum Ratings T

= 25 °C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage 25 V

Gate to Source Voltage (Note 4) ±20 V

Drain Current -Continuous (Package limited) T

= 25 °C 28

-Continuous (Silicon limited) T

= 25 °C 49

-Continuous T

= 25 °C (Note 1a) 15

-Pulsed 60

Single Pulse Avalanche Energy (Note 3) 32 mJ

Power Dissipation T

= 25 °C 27

Power Dissipation T

= 25 °C (Note 1a) 2.5

, T

STG

Operating and Storage Junction Temperature Range -55 to +150 °C

θJC

Thermal Resistance, Junction to Case 4.6

°C/W

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 50

Device Marking Device Package Reel Size Tape Width Quantity

FDMS7580 FDMS7580 Power 56 13 ’’ 12 mm 3000 units

Summary of content (7 pages)

PAGE 1
FDMS7580 N-Channel Power Trench® MOSFET 25 V, 7.5 mΩ Features General Description Max rDS(on) = 7.5 mΩ at VGS = 10 V, ID = 15 A This N-Channel MOSFET has been designed specifically to improve the overall efficiency and to minimize switch node ringing of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low rDS(on), fast switching speed and body diode reverse recovery performance. Max rDS(on) = 11.1 mΩ at VGS = 4.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 µA, VGS = 0 V ∆BVDSS ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 20 V, VGS = 0 V 1 µA IGSS Gate to Source Leakage Current VGS = 20 V, VDS = 0 V 100 nA 3.
PAGE 3
60 VGS = 4.0 V ID, DRAIN CURRENT (A) 50 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 40 VGS = 10 V 30 VGS = 3.5 V 20 10 VGS = 3.0 V 0 0 1 2 3 4 10 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 4.5 V 8 VGS = 3.5 V 6 4 VGS = 4.0 V 2 0 Figure 1. On-Region Characteristics 10 20 30 40 ID, DRAIN CURRENT (A) 50 60 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 40 I = 15 A 1.5 D VGS = 10 V rDS(on), DRAIN TO 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.
PAGE 4
2000 ID = 15 A 1000 8 Ciss VDD = 13 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 6 VDD = 10 V VDD = 16 V 4 2 Coss 100 f = 1 MHz VGS = 0 V 20 0.1 0 0 2 4 6 8 10 12 Crss 14 1 10 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 50 20 10 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) VGS = 10 V TJ = 25 oC TJ = 100 oC TJ = 125 oC 40 30 VGS = 4.
PAGE 5
2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 0.01 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 125 C/W 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Transient Thermal Response Curve FDMS7580 Rev.C 5 www.fairchildsemi.
PAGE 6
FDMS7580 N-Channel Power Trench® MOSFET Dimensional Outline and Pad Layout FDMS7580 Rev.C 6 www.fairchildsemi.
PAGE 7
tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.