Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDMS7670, MOSFET

July 2012

FDMS7670 Rev.D2

www.fairchildsemi.com

FDMS7670 N-Channel PowerTrench

MOSFET

FDMS7670

N-Channel PowerTrench

MOSFET

30 V, 3.8 mΩ

Features

 Max r

DS(on)

= 3.8 mΩ at V

= 10 V, I

= 21 A

 Max r

DS(on)

= 5.0 mΩ at V

= 4.5 V, I

= 17 A

 Advanced Package and Silicon design for low r

DS(on)

and high

efficiency

 Next generation enhanced body diode technology, engineered

for soft recovery. Provides Schottky-like performance with

minimum EMI in sync buck converter applications

 MSL1 robust package design

 100% UIL tested

 RoHS Compliant

General Description

This N-Channel MOSFET has been designed specifically to

improve the overall efficiency and to minimize switch node

ringing of DC/DC converters using either synchronous or

conventional switching PWM controllers. It has been optimized

for low gate charge, low r

DS(on)

, fast switching speed and body

diode reverse recovery performance.

Applications

 IMVP Vcore Switching for Notebook

 VRM Vcore Switching for Desktop and Server

 OringFET / Load Switch

 DC-DC Conversion

Bottom

Power 56

Top

Pin 1

MOSFET Maximum Ratings T

= 25 °C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage 30 V

Gate to Source Voltage (Note 4) ±20 V

Drain Current -Continuous (Package limited) T

= 25 °C 42

-Continuous (Silicon limited) T

= 25 °C 105

-Continuous T

= 25 °C (Note 1a) 21

-Pulsed 150

Single Pulse Avalanche Energy (Note 3) 144 mJ

Power Dissipation T

= 25 °C 62

Power Dissipation T

= 25 °C (Note 1a) 2.5

, T

STG

Operating and Storage Junction Temperature Range -55 to +150 °C

θJC

Thermal Resistance, Junction to Case 2.0

°C/W

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 50

Device Marking Device Package Reel Size Tape Width Quantity

FDMS7670 FDMS7670 Power 56 13 ’’ 12 mm 3000 units

Summary of content (7 pages)

PAGE 1
FDMS7670 N-Channel PowerTrench® MOSFET 30 V, 3.8 mΩ Features General Description This N-Channel MOSFET has been designed specifically to improve the overall efficiency and to minimize switch node ringing of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low rDS(on), fast switching speed and body diode reverse recovery performance. Max rDS(on) = 3.8 mΩ at VGS = 10 V, ID = 21 A Max rDS(on) = 5.0 mΩ at VGS = 4.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V 100 nA 3.
PAGE 3
5 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 150 VGS = 10 V 120 ID, DRAIN CURRENT (A) VGS = 4 V VGS = 5 V VGS = 4.5 V 90 60 VGS = 3.5 V 30 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0.0 0.5 1.0 1.5 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 4 VGS = 3.5 V 3 VGS = 4.5 V 2 1 VGS = 5 V 2.0 0 30 60 90 120 150 ID, DRAIN CURRENT (A) Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 15 ID = 21 A VGS = 10 V rDS(on), DRAIN TO 1.
PAGE 4
5000 Ciss ID = 21 A 8 CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 15 V 6 VDD = 10 V VDD = 20 V 4 2 Coss 1000 100 50 0.1 0 0 10 20 30 Crss f = 1 MHz VGS = 0 V 40 1 Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 120 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) 100 40 TJ = 25 oC 10 TJ = 100 oC TJ = 125 oC 100 VGS = 10 V 80 VGS = 4.5 V 60 40 20 1 0.01 0.1 1 10 100 0 25 1000 50 75 100 125 150 o Figure 9.
PAGE 5
2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 0.1 PDM 0.01 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 125 C/W 0.001 0.0005 -4 10 -3 -2 10 -1 10 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve Figure 15.
PAGE 6
FDMS7670 N-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout ©2012 Fairchild Semiconductor Corporation FDMS7670 Rev.D2 6 www.fairchildsemi.
PAGE 7
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.