Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDMS86102LZ, MOSFET

May 2011

FDMS86102LZ N-Channel Power Trench

MOSFET

FDMS86102LZ Rev.C

FDMS86102LZ

N-Channel Power Trench

MOSFET

100 V, 22 A, 25 mΩ

Features

 Max r

DS(on)

= 25 mΩ at V

= 10 V, I

= 7 A

 Max r

DS(on)

= 37 mΩ at V

= 4.5 V, I

= 5.8 A

 HBM ESD protection level > 6 KV typical (Note 4)

 100% UIL Tested

 RoHS Compliant

General Description

This N-Channel logic Level MOSFETs are produced using

Fairchild

Semiconductor's advanced Power Trench

process

that has

been special tailored to minimize the on-state

resistance and yet maintain superior switching performance.

G-S zener has been added to enhance ESD voltage level.

Applications

 DC - DC Conversion

 Inverter

 Synchronous Rectifier

Power 56

Pin 1

Bottom

Top

MOSFET Maximum Ratings T

= 25 °C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage 100 V

Gate to Source Voltage ±20 V

Drain Current -Continuous (Package limited) T

= 25 °C 22

-Continuous (Silicon limited) T

= 25 °C 37

-Continuous T

= 25 °C (Note 1a) 7

-Pulsed 40

Single Pulse Avalanche Energy (Note 3) 84 mJ

Power Dissipation T

= 25 °C 69

Power Dissipation T

= 25 °C (Note 1a) 2.5

, T

STG

Operating and Storage Junction Temperature Range -55 to +150 °C

θJC

Thermal Resistance, Junction to Case 1.8

°C/W

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 50

Device Marking Device Package Reel Size Tape Width Quantity

FDMS86102Z FDMS86102LZ Power 56 13 ’’ 12 mm 3000 units

Summary of content (7 pages)

PAGE 1
FDMS86102LZ N-Channel Power Trench® MOSFET 100 V, 22 A, 25 mΩ Features General Description Max rDS(on) = 25 mΩ at VGS = 10 V, ID = 7 A This N-Channel logic Level MOSFETs are produced using Fairchild Semiconductor's advanced Power Trench® process that has been special tailored to minimize the on-state resistance and yet maintain superior switching performance. G-S zener has been added to enhance ESD voltage level. Max rDS(on) = 37 mΩ at VGS = 4.5 V, ID = 5.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 80 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±10 μA 2.
PAGE 3
40 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 6 ID, DRAIN CURRENT (A) VGS = 3.5 V 30 VGS = 10 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VGS = 4.5 V 20 VGS = 3 V 10 VGS = 2.5 V 0 0 1 2 3 4 5 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 5 VGS = 2.5 V 4 VGS = 3 V 3 VGS = 3.5 V 2 VGS = 4.5 V 1 VGS = 10 V 0 0 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics 40 100 ID = 7 A 1.8 VGS = 10 V rDS(on), DRAIN TO 1.6 1.4 1.2 1.0 0.8 0.
PAGE 4
5000 ID = 7 A Ciss VDD = 50 V 1000 8 VDD = 25 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 75 V 6 4 Coss 100 Crss 10 2 f = 1 MHz VGS = 0 V 0 0 4 8 12 1 0.1 16 1 Figure 7. Gate Charge Characteristics 100 Figure 8. Capacitance vs Drain to Source Voltage 40 ID, DRAIN CURRENT (A) 50 IAS, AVALANCHE CURRENT (A) 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) TJ = 25 oC 10 TJ = 100 oC TJ = 125 oC 32 24 VGS = 10 V 16 VGS = 4.
PAGE 5
P(PK), PEAK TRANSIENT POWER (W) 1000 100 10 SINGLE PULSE o RθJA = 125 C/W o TA = 25 C 1 0.5 -4 10 -3 -2 10 -1 10 10 1 100 10 1000 t, PULSE WIDTH (sec) Figure 13. Single Pulse Maximum Power Dissipation 2 DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 125 C/W 0.
PAGE 6
FDMS86102LZ N-Channel Power Trench® MOSFET Dimensional Outline and Pad Layout ©2011 Fairchild Semiconductor Corporation FDMS86102LZ Rev. C 6 www.fairchildsemi.
PAGE 7
tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.