Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDMS86201, MOSFET

August 2013

FDMS86201 Rev.C2

www.fairchildsemi.com

FDMS86201 N-Channel Shielded Gate PowerTrench

MOSFET

FDMS86201

N-Channel Shielded Gate PowerTrench

MOSFET

120 V, 49 A, 11.5 mΩ

Features

 Shielded Gate MOSFET Technology

 Max r

DS(on)

= 11.5 mΩ at V

= 10 V, I

= 11.6 A

 Max r

DS(on)

= 14.5 mΩ at V

= 6 V, I

= 10.7 A

 Advanced Package and Silicon combination for low r

DS(on)

and high efficiency

 MSL1 robust package design

 100% UIL tested

 RoHS Compliant

General Description

This N-Channel MOSFET is produced using Fairchild

Semiconductor‘s advanced PowerTrench

process that

incorporates Shielded Gate technology. This process has been

optimized

for the on-state resistance and yet maintain superior

switching performance.

Application

 DC-DC Conversion

Power 56

Pin 1

Bottom

Top

MOSFET Maximum Ratings T

= 25 °C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage 120 V

Gate to Source Voltage ±20 V

Drain Current -Continuous T

= 25 °C 49

A -Continuous T

= 25 °C (Note 1a) 11.6

-Pulsed 160

Single Pulse Avalanche Energy (Note 3) 264 mJ

Power Dissipation T

= 25 °C 104

Power Dissipation T

= 25 °C (Note 1a) 2.5

, T

STG

Operating and Storage Junction Temperature Range -55 to +150 °C

θJC

Thermal Resistance, Junction to Case 1.2

°C/W

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 50

Device Marking Device Package Reel Size Tape Width Quantity

FDMS86201 FDMS86201 Power 56 13 ’’ 12 mm 3000 units

Summary of content (7 pages)

PAGE 1
FDMS86201 N-Channel Shielded Gate PowerTrench® MOSFET 120 V, 49 A, 11.5 mΩ Features General Description This N-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced PowerTrench® process that incorporates Shielded Gate technology. This process has been optimized for the on-state resistance and yet maintain superior switching performance. Shielded Gate MOSFET Technology Max rDS(on) = 11.5 mΩ at VGS = 10 V, ID = 11.6 A Max rDS(on) = 14.5 mΩ at VGS = 6 V, ID = 10.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 96 V, VGS = 0 V IGSS Gate to Source Leakage Current, Forward VGS = ±20 V, VDS = 0 V 120 V 95 mV/°C 1 μA 100 nA 4.
PAGE 3
.0 ID, DRAIN CURRENT (A) VGS = 10 V VGS = 6 V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 160 VGS = 5.5 V 120 VGS = 5 V 80 VGS = 4.5 V 40 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 2.5 VGS = 4.5 V 1.5 VGS = 6 V 1.0 0.5 0 1 2 3 4 5 0 40 VDS, DRAIN TO SOURCE VOLTAGE (V) 80 120 160 ID, DRAIN CURRENT (A) Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 40 I = 11.6 A 2.0 D VGS = 10 V rDS(on), DRAIN TO 1.8 1.6 1.4 1.2 1.0 0.8 0.
PAGE 4
000 Ciss ID = 11.6 A VDD = 60 V 8 Coss 1000 VDD = 35 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 85 V 6 4 100 Crss f = 1 MHz VGS = 0 V 2 10 0.1 0 0 5 10 15 20 25 30 35 1 Figure 7. Gate Charge Characteristics 75 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) 100 Figure 8. Capacitance vs Drain to Source Voltage 60 TJ = 25 oC 10 TJ = 100 TJ = oC 125 oC 60 45 VGS = 10 V Limited by Package 30 VGS = 6 V 15 o RθJC = 1.2 C/W 1 0.01 0.
PAGE 5
2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 125 C/W 0.001 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve ©2010 Fairchild Semiconductor Corporation FDMS86201 Rev.C2 5 www.fairchildsemi.
PAGE 6
FDMS86201 N-Channel Shielded Gate PowerTrench® MOSFET Dimensional Outline and Pad Layout ©2010 Fairchild Semiconductor Corporation FDMS86201 Rev.C2 6 www.fairchildsemi.
PAGE 7
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.