Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDMS86250, MOSFET

July 2014

FDMS86250 Rev. C3

www.fairchildsemi.com

FDMS86250 N-Channel Shielded Gate PowerTrench

MOSFET

FDMS86250

N-Channel Shielded Gate PowerTrench

MOSFET

150 V, 30 A, 25 mΩ

Features

 Shielded Gate MOSFET Technology

 Max r

DS(on)

= 25 mΩ at V

= 10 V, I

= 6.7 A

 Max r

DS(on)

= 33 mΩ at V

= 6 V, I

= 5.8 A

 Advanced package and silicon combination for low r

DS(on)

and

high efficiency

 MSL1 robust package design

 100% UIL tested

 RoHS Compliant

General Description

This N-Channel MOSFET is produced using Fairchild

Semiconductor’s advanced PowerTrench

process that

incorporates Shielded Gate technology. This process has been

optimized for the on-state resistance and yet maintain superior

switching performance.

Application

 DC-DC Conversion

Power 56

Pin 1

Bottom

Top

MOSFET Maximum Ratings T

= 25 °C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage 150 V

Gate to Source Voltage ±20 V

Drain Current -Continuous T

= 25 °C 30

A -Continuous T

= 25 °C (Note 1a) 6.7

-Pulsed (Note 4) 100

Single Pulse Avalanche Energy (Note 3) 180 mJ

Power Dissipation T

= 25 °C 96

Power Dissipation T

= 25 °C (Note 1a) 2.5

, T

STG

Operating and Storage Junction Temperature Range -55 to +150 °C

θJC

Thermal Resistance, Junction to Case 1.3

°C/W

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 50

Device Marking Device Package Reel Size Tape Width Quantity

FDMS86250 FDMS86250 Power 56 13 ’’ 12

mm 3000 units

Summary of content (8 pages)

PAGE 1
FDMS86250 N-Channel Shielded Gate PowerTrench® MOSFET 150 V, 30 A, 25 mΩ Features General Description This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench® process that incorporates Shielded Gate technology. This process has been optimized for the on-state resistance and yet maintain superior switching performance. Shielded Gate MOSFET Technology Max rDS(on) = 25 mΩ at VGS = 10 V, ID = 6.7 A Max rDS(on) = 33 mΩ at VGS = 6 V, ID = 5.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 120 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA 4.
PAGE 3
4 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) 100 VGS = 6.5 V VGS = 10 V 80 VGS = 6 V 60 40 VGS = 5.5 V 20 VGS = 5 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0 1 2 3 4 VGS = 5 V VGS = 6 V 2 VGS = 6.5 V 1 0 5 0 20 60 80 100 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 80 ID = 6.7 A VGS = 10 V 2.2 2.0 rDS(on), DRAIN TO 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 -75 -50 SOURCE ON-RESISTANCE (mΩ) 2.
PAGE 4
5000 VDD =75 V ID = 6.7 A Ciss 1000 8 VDD = 50 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 100 V 6 4 Coss 100 10 Crss 2 f = 1 MHz VGS = 0 V 0 0 4 8 12 16 20 24 1 0.1 28 1 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 50 50 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) o RθJC = 1.3 C/W TJ = 25 oC 10 TJ = 100 oC TJ = 125 oC 1 0.001 0.01 0.
PAGE 5
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 DUTY CYCLE-DESCENDING ORDER 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: ZθJC(t) = r(t) x RθJC RθJC = 1.3 oC/W Peak TJ = PDM x ZθJC(t) + TC Duty Cycle, D = t1 / t2 SINGLE PULSE 0.01 0.005 -5 10 -4 10 -3 -2 10 10 -1 10 1 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Case Transient Thermal Response Curve ©2012 Fairchild Semiconductor Corporation FDMS86250 Rev. C3 5 www.fairchildsemi.
PAGE 6
5.20 4.90 0.64 PKG CL 8 5.10 3.91 A B 5 8 7 6 1.27 5 0.77 4.52 3.75 6.25 5.90 PKG CL 6.61 KEEP OUT AREA PIN #1 IDENT MAY APPEAR AS OPTIONAL 1.27 1 4 1 2 3 4 TOP VIEW 0.61 1.27 3.81 LAND PATTERN RECOMMENDATION SEE DETAIL A SIDE VIEW 0.10 C 0.05 0.00 8X 0.08 C 1.10 0.90 3.81 1.27 0.10 0.51 (8X) 0.31 (0.39) 1 2 3 C A B 4 0.76 0.44 (0.35) CHAMFER CORNER AS PIN #1 IDENT MAY APPEAR AS OPTIONAL 4.22 3.99 (1.81) (4X) (1.19) 8 7 6 5 3.92 3.66 BOTTOM VIEW 0.64 0.
PAGE 7
5.20 4.90 A PKG CL 8 B 5 0.35 0.15 SEE DETAIL B 0.30 0.10 6.25 5.90 PKG CL 1 6° 5.85 5.65 SCALE: 2:1 4 TOP VIEW OPTIONAL DRAFT ANGLE MAY APPEAR ON FOUR SIDES OF THE PACKAGE 5.00 4.80 SEE DETAIL C 6° 0.10 C 0.05 0.00 8X SIDE VIEW 0.08 C 1.10 0.90 3.81 0.10 2 3 C A B 4 0.76 0.44 (0.52) 3.58 3.38 (0.50) (0.30) (2X) 8 SEATING PLANE 0.51 (8X) 0.31 (0.34) (3.40) C SCALE: 2:1 1.27 1 0.35 0.15 7 6 3.92 3.66 BOTTOM VIEW 5 0.64 0.34 4.22 3.
PAGE 8
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