Datasheet
FDMS9600S Dual N-Channel PowerTrench
®
MOSFET
©2008 Fairchild Semiconductor Corporation
FDMS96
00S Rev.D
1
www.fairchi
ldsemi.com
1
tm
September 2008
FDMS9600S
Dual N-Channel PowerTrench
®
MOSFET
Q1: 30V, 32A, 8.5mΩ Q2: 30V, 30A, 5.5mΩ
Features
Q1: N-Channel
Max r
DS(on)
= 8.5mΩ at V
GS
= 10V, I
D
= 12A
Max r
DS(on)
= 12.4mΩ at V
GS
= 4.5V, I
D
= 10A
Q2: N-Channel
Max r
DS(on)
= 5.5mΩ at V
GS
= 10V, I
D
= 16A
Max r
DS(on)
= 7.0mΩ at V
GS
= 4.5V, I
D
= 14A
Low Qg high side MOSFET
Low r
DS(on)
low side MOSFET
Thermally efficient dual Power 56 package
Pinout optimized for simple PCB design
RoHS Compliant
General Description
This device includes two specialized MOSFETs in a unique dual
Power 56 package. It is designed to provide an optimal
Synchronous Buck power stage in terms of efficiency and PCB
utilization. The low switching loss "High Side" MOSFET is com-
plemented by a Low Conduction Loss "Low Side" SyncFET.
Applications
Synchronous Buck Converter for:
Notebook System Power
General Purpose Point of Load
MOSFET Maximum Ratings T
A
= 25°C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Q1 Q2 Units
V
DS
Drain to Source Voltage 30 30 V
V
GS
Gate to Source Voltage ±20 ±20 V
I
D
Drain Current -Continuous (Package limited) T
C
= 25°C 32 30
A
-Continuous (Silicon limited) T
C
= 25°C 55 108
-Continuous T
A
= 25°C (Note 1a) 12 16
-Pulsed 60 60
P
D
Power Dissipation for Single Operation (Note 1a) 2.5
W
(Note 1b) 1.0
T
J
, T
STG
Operating and Storage Junction Temperature Range -55 to +150 °C
R
θJA
Thermal Resistance, Junction to Ambient (Note 1a) 50
°C/WR
θJA
Thermal Resistance, Junction to Ambient (Note 1b) 120
R
θJC
Thermal Resistance, Junction to Case 3 1.2
Device Marking Device Package Reel Size Tape Width Quantity
FDMS9600S FDMS9600S Power 56 13” 12mm 3000 units
G1
D1
D1
D1
S1/D2
G2
S2
S2
S2
D1
G1
D1
D1
D1
S1/D2
G2
S2
S2
S2
D1
4
3
2
1
5
6
7
8
Q
1
Q2
Power 56