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ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDP12N60NZ, MOSFET

November 2013

FDP12N60NZ / FDPF12N60NZ — N-Channel UniFET

II MOSFET

FDP12N60NZ / FDPF12N60NZ Rev. C2

www.fairchildsemi.com

FDP12N60NZ / FDPF12N60NZ

N-Channel UniFET

II MOSFET

600 V, 12 A, 650 mΩ

Features

•R

DS(on)

= 530 mΩ (Typ.) @ V

= 10 V, I

= 6 A

• Low Gate Charge (Typ. 26 nC)

•Low C

rss

(Typ. 12 pF)

• 100% Avalanche Tested

• Improved dv/dt Capability

• ESD Improved Capability

•RoHS Compliant

Applications

• LCD/ LED/ PDP TV

• Lighting

• Uninterruptible Power Supply

Description

UniFET

II MOSFET is Fairchild Semiconductor’s high voltage

MOSFET family based on advanced planar stripe and DMOS

technology. This advanced MOSFET family has the smallest

on-state resistance among the planar MOSFET, and also pro-

vides superior switching performance and higher avalanche

energy strength. In addition, internal gate-source ESD diode

allows UniFET II MOSFET to withstand over 2kV HBM surge

stress. This device family is suitable for switching power con-

verter applications such as power factor correction (PFC), flat

panel display (FPD) TV power, ATX and electronic lamp bal-

lasts.

TO-220

TO-220F

MOSFET Maximum Ratings T

= 25

C unless otherwise noted.

Thermal Characteristics

Symbol Parameter FDP12N60NZ

FDPF12N60NZ

Unit

DSS

Drain to Source Voltage 600 V

GSS

Gate to Source Voltage ±30 V

Drain Current

- Continuous (T

= 25

C) 12 12*

- Continuous (T

= 100

C) 7.2 7.2*

Drain Current - Pulsed (Note 1) 48 48* A

Single Pulsed Avalanche Energy (Note 2) 565 mJ

Avalanche Current (Note 1) 12 A

Repetitive Avalanche Energy (Note 1) 24 mJ

dv/dt

MOSFET dv/dt Ruggedness 20 V/ns

Peak Diode Recovery dv/dt (Note 3) 10 V/ns

Power Dissipation

= 25

C) 240 39 W

- Derate Above 25

C2.00.3W/

, T

STG

Operating and Storage Temperature Range -55 to +150

Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds

300

Symbol Parameter FDP12N60NZ FDPF12N60NZ Unit

θJC

Thermal Resistance, Junction to Case, Max. 0.52 3.2

C/W

θJA

Thermal Resistance, Junction to Ambient, Max. 62.5 62.5

*Drain current limited by maximum junction temperature

Summary of content (10 pages)

PAGE 1
FDP12N60NZ / FDPF12N60NZ N-Channel UniFETTM II MOSFET 600 V, 12 A, 650 mΩ Features Description • RDS(on) = 530 mΩ (Typ.) @ VGS = 10 V, ID = 6 A UniFETTM II MOSFET is Fairchild Semiconductor’s high voltage MOSFET family based on advanced planar stripe and DMOS technology. This advanced MOSFET family has the smallest on-state resistance among the planar MOSFET, and also provides superior switching performance and higher avalanche energy strength.
PAGE 2
Part Number Top Mark FDP12N60NZ FDP12N60NZ Package TO-220 Packing Method Tube Reel Size N/A Tape Width N/A Quantity 50 units FDPF12N60NZ FDPF12N60NZ TO-220F Tube N/A N/A 50 units Electrical Characteristics Symbol TC = 25oC unless otherwise noted. Parameter Test Conditions Min. Typ. Max. Unit 600 - - V - 0.
PAGE 3
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 100 30 ID, Drain Current[A] 10 ID, Drain Current[A] VGS = 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 1 o 10 150 C o 25 C o -55 C 1 *Notes: 1. 250μs Pulse Test * Notes : 1. VDS = 20V 2. 250μs Pulse Test o 2. TC = 25 C 0.1 0.1 0.1 1 VDS, Drain-Source Voltage[V] 10 20 3 4 5 6 7 VGS, Gate-Source Voltage[V] Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 1.0 100 0.
PAGE 4
Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs Temperature 3.0 RDS(on), [Normalized] Drain-Source On-Resistance BVDSS, [Normalized] Drain-Source Breakdown Voltage 1.2 1.1 1.0 0.9 * Notes : 1. VGS = 0V 2. ID = 250uA 0.8 -80 -40 0 40 80 120 o TJ, Junction Temperature [ C] 2.5 2.0 1.5 1.0 * Notes : 1. VGS = 10V 2. ID = 6A 0.5 0 -80 160 Figure 9. Maximum Safe Operating Area - FDPF12N60NZ -40 0 40 80 120 o TJ, Junction Temperature [ C] Figure 10.
PAGE 5
FDP12N60NZ / FDPF12N60NZ — N-Channel UniFETTM II MOSFET Typical Performance Characteristics (Continued) o Z Response θJC(t), Thermal Thermal Response [ZθJC[] C/W] Figure 12. Transient Thermal Response Curve - FDPF12N60NZ 5 0.5 1 0.2 0.1 0.05 0.1 P 0.02 DM 0.01 0.01 t 1 t 2 * Notes : Single pulse o 1. ZθJC(t) = 3.2 C/W Max. 2. Duty Factor, D=t1/t2 3. TJM - TC = PDM * ZθJC(t) 0.
PAGE 6
FDP12N60NZ / FDPF12N60NZ — N-Channel UniFETTM II MOSFET IG = const. Figure 14. Gate Charge Test Circuit & Waveform VDS RG RL VDS VDD VGS VGS DUT V 10V GS 90% 10% td(on) tr t on td(off) tf t off Figure 15. Resistive Switching Test Circuit & Waveforms VGS Figure 16. Unclamped Inductive Switching Test Circuit & Waveforms ©2010 Fairchild Semiconductor Corporation FDP12N60NZ / FDPF12N60NZ Rev. C2 6 www.fairchildsemi.
PAGE 7
FDP12N60NZ / FDPF12N60NZ — N-Channel UniFETTM II MOSFET DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop Figure 17.
PAGE 8
FDP12N60NZ / FDPF12N60NZ — N-Channel UniFETTM II MOSFET Mechanical Dimensions Figure 18. TO-220, Molded, 3-Lead, Jedec Variation AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 9
FDP12N60NZ / FDPF12N60NZ — N-Channel UniFETTM II MOSFET Mechanical Dimensions Figure 19. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 10
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.