Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDP22N50N, MOSFET

November 2013

FDP22N50N — N-Channel UniFET

II MOSFET

FDP22N50N Rev. C1

www.fairchildsemi.com

FDP22N50N

N-Channel UniFET

II MOSFET

500 V, 22 A, 220 mΩ

Features

•R

DS(on)

= 185 mΩ (Typ.) @ V

= 10 V, I

= 11 A

• Low Gate Charge (Typ. 49 nC)

•Low C

rss

(Typ. 24 pF)

• 100% Avalanche Tested

• Improve dv/dt Capability

•RoHS Compliant

Applications

•PDP TV

• Lighting

• Uninterruptible Power Supply

• AC-DC Power Supply

Description

UniFET

II MOSFET is Fairchild Semiconductor’s high voltage

MOSFET family based on advanced planar stripe and DMOS

technology. This advanced MOSFET family has the smallest

on-state resistance among the planar MOSFET, and also pro-

vides superior switching performance and higher avalanche

energy strength. In addition, internal gate-source ESD diode

allows UniFET II MOSFET to withstand over 2kV HBM surge

stress. This device family is suitable for switching power con-

verter applications such as power factor correction (PFC), flat

panel display (FPD) TV power, ATX and electronic lamp bal-

lasts.

MOSFET Maximum Ratings T

= 25

C unless otherwise noted.

Thermal Characteristics

Symbol Parameter FDP22N50N Unit

DSS

Drain to Source Voltage 500 V

GSS

Gate to Source Voltage ±30 V

D r a i n C u r r e n t

- Continuous (T

= 25

C) 22

- Continuous (T

= 100

C) 13.2

D r a i n C u r r e n t - P u l s e d (Note 1) 88 A

Single Pulsed Avalanche Energy (Note 2) 1000 mJ

Avalanche Current (Note 1) 22 A

Repetitive Avalanche Energy (Note 1) 31.25 mJ

dv/dt Peak Diode Recovery dv/dt (Note 3) 10 V/ns

Power Dissipation

= 25

C) 312.5 W

- Derate Above 25

C2.5W/

, T

STG

Operating and Storage Temperature Range -55 to +150

Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds

300

Symbol Parameter FDP22N50N Unit

θJC

Thermal Resistance, Junction to Case, Max. 0.4

C/W

θJA

Thermal Resistance, Junction to Ambient, Max. 62.5

TO-220

Summary of content (8 pages)

PAGE 1
FDP22N50N N-Channel UniFETTM II MOSFET 500 V, 22 A, 220 mΩ Features Description • RDS(on) = 185 mΩ (Typ.) @ VGS = 10 V, ID = 11 A UniFETTM II MOSFET is Fairchild Semiconductor’s high voltage MOSFET family based on advanced planar stripe and DMOS technology. This advanced MOSFET family has the smallest on-state resistance among the planar MOSFET, and also provides superior switching performance and higher avalanche energy strength.
PAGE 2
Part Number FDP22N50N Top Mark FDP22N50N Package TO-220 Packing Method Tube Reel Size N/A Tape Width N/A Quantity 50 units Electrical Characteristics TC = 25oC unless otherwise noted. Symbol Parameter Test Conditions Min. Typ. Max. Unit 500 - - V - 0.
PAGE 3
Figure 2. Transfer Characteristics 50 100 VGS = 15.0V 10.0V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 10 *Notes: 1. VDS = 20V 2. 250μs Pulse Test ID,Drain Current[A] ID,Drain Current[A] Figure 1. On-Region Characteristics 1 10 o o 25 C 150 C o -55 C 1 *Notes: 1. 250μs Pulse Test o 0.2 0.05 2. TC = 25 C 0.1 0.1 1 VDS,Drain-Source Voltage[V] 10 Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 4 5 6 7 VGS,Gate-Source Voltage[V] 100 IS, Reverse Drain Current [A] 0.
PAGE 4
Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 3.0 1.1 1.0 0.9 *Notes: 1. VGS = 0V 2. ID = 250μA 0.8 -75 -25 25 75 125 o TJ, Junction Temperature [ C] 2.5 RDS(on), [Normalized] Drain-Source On-Resistance BVDSS, [Normalized] Drain-Source Breakdown Voltage 1.2 2.0 1.5 1.0 0.0 -75 175 Figure 9.
PAGE 5
FDP22N50N — N-Channel UniFETTM II MOSFET IG = const. Figure 12. Gate Charge Test Circuit & Waveform VDS RG RL VDS VDD VGS VGS DUT V 10V GS 90% 10% td(on) tr t on td(off) tf t off Figure 13. Resistive Switching Test Circuit & Waveforms VGS Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms ©2009 Fairchild Semiconductor Corporation FDP22N50N Rev. C1 5 www.fairchildsemi.
PAGE 6
FDP22N50N — N-Channel UniFETTM II MOSFET DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop Figure 15.
PAGE 7
FDP22N50N — N-Channel UniFETTM II MOSFET Mechanical Dimensions Figure 16. TO220, Molded, 3-Lead, Jedec Variation AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 8
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.