Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDP3672, MOSFET

November 2013

FDP3672 — N-Channel PowerTrench

MOSFET

www.fairchildsemi.com

FDP3672

Features

Formerly developmental type 82760

Applications

MOSFET Maximum Ratings T

= 25°C unless otherwise noted

N-Channel PowerTrench

MOSFET

105 V, 41 A, 33 mΩ

DS(on)

= 25 mΩ ( Typ.) @ V

= 10 V, I

= 41 A

G(tot)

= 28 nC ( Typ.) @ V

= 10 V

Low Miller Charge

Low Q

Body Diode

Optimized Efficiency at High Frequencies

UIS Capability (Single Pulse and Repetitive Pulse)

Consumer Appliances

Synchronous Rectification

Battery Protection Circuit

Motor drives and Uninterruptible Power Supplies

Micro Solar Inverter

•

TO-220

FDP3672 Rev. C2

•

Symbol Parameter

FDP3672

Unit

Thermal Resistance, Junction to Case, Max.

DSS

Drain to Source Voltage 105 V

Gate to Source Voltage ±20 V

41 A

Drain Current

Continuous (T

= 25

C, V

= 10V)

Continuous (T

= 100

C, V

= 10V) 31 A

Continuous (T

amb

= 25

C, V

= 10V, R

θJA

= 62

C/W) 5.9 A

Pulsed Figure 4 A

Single Pulse Avalanche Energy (Note 1) 48 mJ

Power dissipation 135 W

Derate above 25

C0.9

CW/

, T

STG

Operating and Storage Temperature -55 to 175

Thermal Resistance, Junction to Ambient, Max. (Note 2) 62

Thermal Characteristics

θJC

C/W

θJA

C/W

1.11

Summary of content (11 pages)

PAGE 1
FDP3672 N-Channel PowerTrench® MOSFET 105 V, 41 A, 33 mΩ Features Applications • RDS(on) = 25 mΩ ( Typ.) @ VGS = 10 V, ID = 41 A • Consumer Appliances • QG(tot) = 28 nC ( Typ.
PAGE 2
Device Marking FDP3672 Device FDP3672 Package TO-220 Reel Size Tube Tape Width N/A Quantity 50 units Electrical Characteristics TC = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Unit Off Characteristics B VDSS Drain to Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current IGSS Gate to Source Leakage Current ID = 250µA, VGS = 0V 105 - - V - - 1 - - 250 µA VGS = ±20V - - ±100 nA VGS = VDS, ID = 250µA 2 - 4 V ID = 41A, VGS = 10V - 0
PAGE 3
1.2 50 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER VGS = 10V 1.0 0.8 0.6 0.4 0.2 40 30 20 10 0 0 25 50 75 100 150 125 0 175 25 50 75 TC , CASE TEMPERATURE (oC) 100 125 150 175 TC, CASE TEMPERATURE (o C) Figure 1. Normalized Power Dissipation vs Ambient Temperature Figure 2. Maximum Continuous Drain Current vs Case Temperature 2 DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 ZθJC, NORMALIZED THERMAL IMPEDANCE 1 PDM 0.
PAGE 4
200 200 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) 10µs 100 100µs 10 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1ms 1 10ms SINGLE PULSE TJ = MAX RATED TC = 25oC STARTING TJ = 25oC 10 STARTING TJ = 150oC DC 1 0.1 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 100 0.001 200 80 0.01 0.1 1 10 tAV, TIME IN AVALANCHE (ms) Figure 5. Forward Bias Safe Operating Area NOTE: Refer to Fairchild Application Notes AN7514 and AN7515 Figure 6.
PAGE 5
1.2 1.2 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE VGS = VDS, ID = 250µA NORMALIZED GATE THRESHOLD VOLTAGE 1.0 0.8 0.6 1.1 1.0 0.9 0.4 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (o C) -80 200 Figure 11. Normalized Gate Threshold Voltage vs Junction Temperature -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (o C) 200 Figure 12.
PAGE 6
VDS BVDSS tP L VARY tP TO OBTAIN REQUIRED PEAK IAS + RG - VGS VDS IAS VDD VDD DUT tP 0V IAS 0 0.01Ω tAV Figure 15. Unclamped Energy Test Circuit Figure 16. Unclamped Energy Waveforms VDS VDD Qg(TOT) VDS L VGS + - VGS VGS = 10V Qgs2 VDD DUT VGS = 2V Ig(REF) 0 Qg(TH) Qgs Qgd Ig(REF) 0 Figure 17. Gate Charge Test Circuit Figure 18. Gate Charge Waveforms VDS tON tOFF td(ON) td(OFF) RL tr VDS 90% - VDD 10% 0 10% DUT 90% VGS VGS 0 Figure 19.
PAGE 7
rev October 2002 LDRAIN DPLCAP 10 Dbody 7 5 DbodyMOD Dbreak 5 11 DbreakMOD Dplcap 10 5 DplcapMOD RLDRAIN RSLC1 51 RSLC2 5 51 Ebreak 11 7 17 18 105 Eds 14 8 5 8 1 Egs 13 8 6 8 1 Esg 6 10 6 8 1 Evthres 6 21 19 8 1 Evtemp 20 6 18 22 1 EVTHRES + 19 8 + LGATE GATE 1 Lgate 1 9 9.56e-9 Ldrain 2 5 1.0e-9 Lsource 3 7 4.45e-9 11 + 17 EBREAK 18 - 50 RDRAIN 6 8 ESG DBREAK ESLC - It 8 17 1 DRAIN 2 5 + .SUBCKT FDP3672 2 1 3 ; Ca 12 8 5.8e-10 Cb 15 14 6.8e-10 Cin 6 8 1.
PAGE 8
REV October 2002 template FDP3672 n2,n1,n3 electrical n2,n1,n3 { var i iscl dp..model dbodymod = (isl=1.0e-11,nl=1.05,rs=3.7e-3,trs1=2.5e-3,trs2=1.0e-6,cjo=1.2e-9,m=0.58,tt=3.75e-8,xti=4.0) dp..model dbreakmod = (rs=15,trs1=4.0e-3,trs2=-5.0e-6) dp..model dplcapmod = (cjo=3.8e-10,isl=10.0e-30,nl=10,m=0.60) m..model mmedmod = (type=_n,vto=3.6,kp=3,is=1e-40, tox=1) m..model mstrongmod = (type=_n,vto=4.3,kp=59,is=1e-30, tox=1) m..model mweakmod = (type=_n,vto=3.09,kp=0.05,is=1e-30, tox=1,rs=0.1) sw_vcsp..
PAGE 9
th JUNCTION REV October 2002 FDP3672 CTHERM1 TH 6 3.2e-3 CTHERM2 6 5 3.3e-3 CTHERM3 5 4 3.4e-3 CTHERM4 4 3 3.5e-3 CTHERM5 3 2 6.4e-3 CTHERM6 2 TL 1.9e-2 RTHERM1 CTHERM1 6 RTHERM1 TH 6 5.5e-4 RTHERM2 6 5 5.0e-3 RTHERM3 5 4 4.5e-2 RTHERM4 4 3 10.5e-2 RTHERM5 3 2 3.4e-1 RTHERM6 2 TL 3.5e-1 RTHERM2 CTHERM2 5 SABER Thermal Model SABER thermal model FDP3672 template thermal_model th tl thermal_c th, tl { cctherm.ctherm1 th 6 =3.2e-3 ctherm.ctherm2 6 5 =3.3e-3 ctherm.ctherm3 5 4 =3.4e-3 ctherm.
PAGE 10
FDP3672 — N-Channel PowerTrench® MOSFET Mechanical Dimensions TO-220 3L Figure 21. TO-220, Molded, 3Lead, Jedec Variation AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 11
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.