Datasheet
December 2012
FDPC8012S PowerTrench
®
Power Clip
©2012 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com
FDPC8012S Rev.C
FDPC8012S
PowerTrench
®
Power Clip
25V Asymmetric Dual N-Channel MOSFET
Features
Q1: N-Channel
Max r
DS(on)
= 7.0 mΩ at V
GS
= 4.5 V, I
D
= 12 A
Q2: N-Channel
Max r
DS(on)
= 2.2 mΩ at V
GS
= 4.5 V, I
D
= 23 A
Low inductance packaging shortens rise/fall times, resulting in
lower switching losses
MOSFET integration enables optimum layout for lower circuit
inductance and reduced switch node ringing
RoHS Compliant
General Description
This device includes two specialized N-Channel MOSFETs in a
dual package. The switch node has been internally connected to
enable easy placement and routing of synchronous buck
converters. The control MOSFET (Q1) and synchronous
SyncFET
TM
(Q2) have been designed to provide optimal power
efficiency.
Applications
Computing
Communications
General Purpose Point of Load
Top
GND
(LSS
HSG
SW
SW
SW
Bottom
3.3 mm x 3.3 mm
Pin 1
HSG
SW
SW
SW
V+
(HSD
V+
LSG
GND
GND
Pin 1
V+
LSG
GND
GND
PAD9
V+(HSD)
PAD10
GND(LSS)
HSG
SW
SW
SW
SW
V+
LSG
GND
GND
MOSFET Maximum Ratings T
A
= 25 °C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Q1 Q2 Units
V
DS
Drain to Source Voltage 25 25 V
V
GS
Gate to Source Voltage 12 12 V
I
D
Drain Current -Continuous T
C
= 25 °C 35 88
A -Continuous T
A
= 25 °C 13
1a
26
1b
-Pulsed (Note 4) 40 120
E
AS
Single Pulse Avalanche Energy (Note 3) 50 181 mJ
P
D
Power Dissipation for Single Operation T
A
= 25 °C 1.6
1a
2.0
1b
W
Power Dissipation for Single Operation T
A
= 25 °C 0.8
1c
0.9
1d
T
J
, T
STG
Operating and Storage Junction Temperature Range -55 to +150 °C
R
θJA
Thermal Resistance, Junction to Ambient 77
1a
63
1b
°C/WR
θJA
Thermal Resistance, Junction to Ambient 151
1c
135
1d
R
θJC
Thermal Resistance, Junction to Case 5.0 3.5
Device Marking Device Package Reel Size Tape Width Quantity
01OD/03OD FDPC8012S Power Clip 33 13 ” 12 mm 3000 units