Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDPF12N50NZ, MOSFET

November 2013

FDP12N50NZ / FDPF12N50NZ — N-Channel UniFET

II MOSFET

FDP12N50NZ / FDPF12N50NZ Rev. C1

www.fairchildsemi.com

FDP12N50NZ / FDPF12N50NZ

N-Channel UniFET

II MOSFET

500 V, 11.5 A, 520 m

Features

•R

DS(on)

= 460 m (Typ.) @ V

= 10 V, I

= 5.75 A

• Low Gate Charge (Typ. 23 nC )

• Low C

rss

(Typ. 14 pF )

• 100% Avalanche Tested

• ESD Improved Capability

• RoHS Compliant

Applications

• LCD/LED/PDP TV

• Lighting

• Uninterruptible Power Supply

Description

UniFET

II MOSFET is Fairchild Semiconductor’s high voltage

MOSFET family based on advanced planar stripe and DMOS

technology. This advanced MOSFET family has the smallest

on-state resistance among the planar MOSFET, and also pro-

vides superior switching performance and higher avalanche

energy strength. In addition, internal gate-source ESD diode

allows UniFET II MOSFET to withstand over 2kV HBM surge

stress. This device family is suitable for switching power con-

verter applications such as power factor correction (PFC), flat

panel display (FPD) TV power, ATX and electronic lamp bal-

lasts.

MOSFET Maximum Ratings T

= 25

C unless otherwise noted.

*Drain current limited by maximum junction temperature

Thermal Characteristics

Symbol Parameter FDP12N50NZ FDPF12N50NZ Unit

DSS

Drain to Source Voltage 500 V

GSS

Gate to Source Voltage ±25 V

Drain Current

- Continuous (T

= 25

C) 11.5 11.5*

- Continuous (T

= 100

C) 6.9 6.9*

Drain Current - Pulsed (Note 1) 46 46* A

Single Pulsed Avalanche Energy (Note 2) 560 mJ

Avalanche Current (Note 1) 11.5 A

Repetitive Avalanche Energy (Note 1) 17 mJ

dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns

Power Dissipation

= 25

C) 170 42 W

- Derate above 25

C 1.37 0.33 W/

, T

STG

Operating and Storage Temperature Range -55 to +150

Maximum Lead Temperature for Soldering,

1/8” from Case for 5 Seconds

300

Symbol Parameter

FDP12N50NZ FDPF12N50NZ

Unit

JC

Thermal Resistance, Junction to Case, Max. 0.73 3.0

C/W

JA

Thermal Resistance, Junction to Ambient, Max. 62.5 62.5

TO-220

TO-220F

Summary of content (10 pages)

PAGE 1
FDP12N50NZ / FDPF12N50NZ N-Channel UniFETTM II MOSFET 500 V, 11.5 A, 520 m Features Description • RDS(on) = 460 m (Typ.) @ VGS = 10 V, ID = 5.75 A UniFETTM II MOSFET is Fairchild Semiconductor’s high voltage MOSFET family based on advanced planar stripe and DMOS technology. This advanced MOSFET family has the smallest on-state resistance among the planar MOSFET, and also provides superior switching performance and higher avalanche energy strength.
PAGE 2
Device Marking FDP12N50NZ Device FDP12N50NZ Package TO-220 Reel Size Tube Tape Width N/A Quantity 50 units FDPF12N50NZ FDPF12N50NZ TO-220F Tube N/A 50 units Electrical Characteristics TC = 25oC unless otherwise noted. Symbol Parameter Test Conditions Min. Typ. Max. Unit 500 - - V - 0.
PAGE 3
Figure 1. On-Region Characteristics 30 50 ID, Drain Current[A] VGS = 15.0 V 10.0 V 8.0 V 7.0 V 6.5V 6.0 V 5.5 V 10 ID, Drain Current[A] Figure 2. Transfer Characteristics 1 10 o 150 C o 25 C 1 o -55 C *Notes: 1. 250s Pulse Test *Notes: 1. VDS = 20V 2. 250s Pulse Test o 0.1 0.1 2. TC = 25 C 1 VDS, Drain-Source Voltage[V] 10 0.1 20 Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 5 6 7 8 VGS, Gate-Source Voltage[V] 9 10 100 0.
PAGE 4
Figure 8. On-Resistance Variation vs. Temperature 1.20 2.8 1.15 2.4 RDS(on), [Normalized] Drain-Source On-Resistance BVDSS, [Normalized] Drain-Source Breakdown Voltage Figure 7. Breakdown Voltage Variation vs. Temperature 1.10 1.05 1.00 0.95 *Notes: 1. VGS = 0V 2. ID = 250uA 0.90 0.85 -100 -50 0 50 100 o TJ, Junction Temperature [ C] 2.0 1.6 1.2 0.4 -75 -50 150 Figure 9. Maximum Safe Operating Area - FDPF12N50NZ *Notes: 1. VGS = 10V 2. ID = 5.75A 0.
PAGE 5
FDP12N50NZ / FDPF12N50NZ — N-Channel UniFETTM II MOSFET Typical Characteristics (Continued) Figure 12. Transient Thermal Response Curve - FDP12N50NZ o ZThermal Response Response [Z[JCC/W] ] JC(t), Thermal 5 1 0.5 0.2 0.1 0.05 0.02 0.01 0.1 0.01 PDM t1 t2 * Notes : Single pulse o 1. ZJC(t) = 0.73 C/W Max. 2. Duty Factor, D=t1/t2 3. TJM - TC = PDM * ZJC(t) 0.001 -5 10 -4 -3 10 -2 -1 10 10 10 Rectangular Pulse Duration [sec] 1 10 t1, Square Wave Pulse Duration [sec] Figure 13.
PAGE 6
FDP12N50NZ / FDPF12N50NZ — N-Channel UniFETTM II MOSFET Figure 14. Gate Charge Test Circuit & Waveform IG = const. Figure 15. Resistive Switching Test Circuit & Waveforms VDS RG RL VDS VDD VGS VGS DUT V 10V GS 90% 10% td(on) tr t on td(off) tf t off Figure 16. Unclamped Inductive Switching Test Circuit & Waveforms VGS ©2010 Fairchild Semiconductor Corporation FDP12N50NZ / FDPF12N50NZ Rev. C1 6 www.fairchildsemi.
PAGE 7
FDP12N50NZ / FDPF12N50NZ — N-Channel UniFETTM II MOSFET Figure 17.
PAGE 8
FDP12N50NZ / FDPF12N50NZ — N-Channel UniFETTM II MOSFET Mechanical Dimensions TO-220 3L Figure 18. TO-220, Molded, 3Lead, Jedec Variation AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 9
FDP12N50NZ / FDPF12N50NZ — N-Channel UniFETTM II MOSFET Mechanical Dimensions TO-220F 3L Figure 19. TO220, Molded, 3LD, Full Pack, EIAJ SC91, Straight Lead Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 10
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.