Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDS4897AC, MOSFET

October 2008

FDS4897AC Dual N & P-Channel PowerTrench

MOSFET

FDS4897AC Rev.C

FDS4897AC

Dual N & P-Channel PowerTrench

MOSFET

N-Channel: 40 V, 6.1 A, 26 mΩ P-Channel: -40 V, -5.2 A, 39 mΩ

Features

Q1: N-Channel

 Max r

DS(on)

= 26 mΩ at V

= 10 V, I

= 6.1 A

 Max r

DS(on)

= 31 mΩ at V

= 4.5 V, I

= 5.6 A

Q2: P-Channel

 Max r

DS(on)

= 39 mΩ at V

= -10 V, I

= -5.2 A

 Max r

DS(on)

= 65 mΩ at V

= -4.5 V, I

= -4.1 A

 100% UIL Tested

 RoHS Compliant

General Description

These dual N- and P-Channel MOSFETs are produced using

Fairchild Semiconductor's advanced PowerTrench

process

that has been especially tailored to minimize on-state resistance

and yet maintain superior switching performance

Applications

 Inverter

 Power Supplies

SO-8

Pin 1

MOSFET Maximum Ratings T

= 25 °C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Q1 Q2 Units

Drain to Source Voltage 40 -40 V

Gate to Source Voltage ±20 ±20 V

Drain Current - Continuous 6.1 -5.2

- Pulsed 24 -24

Power Dissipation for Dual Operation 2.0

WPower Dissipation for Single Operation T

= 25 °C (Note 1a) 1.6

= 25 °C (Note 1b) 0.9

Single Pulse Avalanche Energy (Note 3) 37 73 mJ

, T

STG

Operating and Storage Junction Temperature Range -55 to +150 °C

θJC

Thermal Resistance, Junction to Case, (Note 1) 40

°C/W

θJC

Thermal Resistance, Junction to Ambient, (Note 1a) 78

Device Marking Device Package Reel Size Tape Width Quantity

FDS4897AC FDS4897AC SO-8 13 ” 12 mm 2500 units

Summary of content (10 pages)

PAGE 1
FDS4897AC Dual N & P-Channel PowerTrench® MOSFET N-Channel: 40 V, 6.1 A, 26 mΩ P-Channel: -40 V, -5.2 A, 39 mΩ Features General Description Q1: N-Channel These dual N- and P-Channel MOSFETs are produced using Max rDS(on) = 26 mΩ at VGS = 10 V, ID = 6.1 A Fairchild Semiconductor's advanced PowerTrench® process that has been especially tailored to minimize on-state resistance Max rDS(on) = 31 mΩ at VGS = 4.5 V, ID = 5.6 A and yet maintain superior switching performance.
PAGE 2
Symbol Parameter Test Conditions Type Min 40 -40 Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 µA, VGS = 0 V ID = -250 µA, VGS = 0 V Q1 Q2 ∆BVDSS ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, referenced to 25 °C ID = -250 µA, referenced to 25 °C Q1 Q2 IDSS Zero Gate Voltage Drain Current VDS = 32 V, VGS = 0 V VDS = -32 V, VGS = 0 V Q1 Q2 1 -1 µA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V Q1 Q2 ±100 ±100 nA nA 3.
PAGE 3
Symbol Parameter Test Conditions Type Min Typ Max Units Q1 Q2 0.75 -0.76 1.2 -1.2 V Q1 Q2 17 20 31 36 ns Q1 Q2 7 10 15 20 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 1.3 A VGS = 0 V, IS = -1.3 A Q1 IF = 6.1 A, di/dt = 100 A/s Q2 IF = -5.2 A, di/dt = 100 A/s (Note 2) (Note 2) Notes: 1: RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in.
PAGE 4
24 5 VGS = 4.5 V 20 ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V VGS = 4 V 16 VGS = 3.5 V 12 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 8 4 VGS = 3 V 0 0.0 0.5 1.0 1.5 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = 3 V 4 2 VGS = 4.5 V VGS = 4 V 1 VGS = 10 V 0.5 2.0 0 4 8 12 16 20 24 ID, DRAIN CURRENT (A) Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 80 ID = 6.1 A VGS = 10 V rDS(on), DRAIN TO 1.6 1.4 1.2 1.0 0.8 0.
PAGE 5
2000 ID = 6.1 A 1000 8 VDD = 15 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 6 VDD = 25 V VDD = 20 V 4 Ciss Coss 100 Crss 2 f = 1 MHz VGS = 0 V 0 0 4 8 12 10 0.1 16 1 Figure 7. Gate Charge Characteristics 40 Figure 8. Capacitance vs Drain to Source Voltage 7 10 9 8 7 6 5 6 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 4 3 TJ = 25 oC TJ = 125 oC 2 5 VGS = 10 V 4 VGS = 4.5 V 3 2 1 o RθJA = 78 C/W 1 0.
PAGE 6
2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 0.01 t2 SINGLE PULSE o NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA RθJA = 135 C/W (Note 1b) 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve ©2008 Fairchild Semiconductor Corporation FDS4897AC Rev.C 6 www.fairchildsemi.
PAGE 7
5 VGS = -10 V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE -ID, DRAIN CURRENT (A) 24 VGS = -5 V 20 VGS = - 4 V VGS = -4.5 V 16 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 12 8 VGS = -3.5 V 4 0 0.0 0.5 1.0 1.5 2.0 2.5 VGS = -3.5 V 4 VGS = -4 V 3 VGS = -4.5 V 2 VGS = -5 V 1 VGS = -10 V 0.5 3.0 0 4 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 15. On- Region Characteristics 20 24 120 ID = -5.2 A VGS = -10 V rDS(on), DRAIN TO 1.6 1.4 1.2 1.0 0.8 0.
PAGE 8
-VGS, GATE TO SOURCE VOLTAGE (V) 10 2000 ID = -5.2 A Ciss 1000 8 CAPACITANCE (pF) VDD = -15 V 6 VDD = -20 V VDD = -25 V 4 Coss 100 Crss 2 f = 1 MHz VGS = 0 V 0 0 4 8 12 10 0.1 16 1 6 10 9 8 7 6 5 -ID, DRAIN CURRENT (A) -IAS, AVALANCHE CURRENT (A) 40 Figure 22. Capacitance vs Drain to Source Voltage Figure 21. Gate Charge Characteristics 4 3 TJ = 25 oC 2 TJ = 125 oC 5 4 VGS = -10 V 3 VGS = -4.5 V 2 1 o RθJA = 78 C/W 1 0.1 1 10 0 25 40 50 100 125 150 o Figure 24.
PAGE 9
2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 0.01 t2 SINGLE PULSE NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA o RθJA = 135 C/W (Note 1b) 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 27. Junction-to-Ambient Transient Thermal Response Curve ©2008 Fairchild Semiconductor Corporation FDS4897AC Rev.C 9 www.fairchildsemi.
PAGE 10
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