Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDS5672, MOSFET

FDS5672 Rev. A

July 2005

www.fairchildsemi.com

FDS5672 N-Channel PowerTrench

MOSFET

FDS5672

N-Channel PowerTrench

MOSFET

60V, 12A, 10mΩ

Features

 r

DS(ON)

= 10mΩ, V

= 10V, I

= 12A

 r

DS(ON)

= 14mΩ, V

= 6V, I

= 10A

 High performance trench technology for extremely low

DS(ON)

 Low gate charge

 High power and current handling capability

General Description

This N-Channel MOSFET has been designed specifically to

improve the overall efficiency of DC/DC converters using

either synchronous or conventional switching PWM

controllers. It has been optimized for low gate charge, low

DS(ON)

and fast switching speed.

Applications

 DC/DC converters

SO-8

Branding Dash

Summary of content (12 pages)

PAGE 1
FDS5672 N-Channel PowerTrench® MOSFET 60V, 12A, 10mΩ Features General Description rDS(ON) = 10mΩ, VGS = 10V, ID = 12A This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low rDS(ON) and fast switching speed.
PAGE 2
Symbol VDSS Drain to Source Voltage Parameter Ratings 60 Units V VGS Gate to Source Voltage ±20 V 12 A Drain Current Continuous (TC = 25 oC, VGS = 10V, RθJA = 50oC/W) ID o o Continuous (TC = 25 C, VGS = 6V, RθJA = 50 C/W) 10 Pulsed EAS PD TJ, TSTG Figure 4 A Single Pulse Avalanche Energy (Note 1) 245 mJ Power dissipation 2.
PAGE 3
tON Turn-On Time - - 50 ns td(ON) Turn-On Delay Time - 13 - ns tr Rise Time - 20 - ns td(OFF) Turn-Off Delay Time - 35 - ns tf Fall Time - 14 - ns tOFF Turn-Off Time - - 64 ns ISD = 12A - - 1.25 V ISD = 6A - - 1.0 V VDD = 30V, ID = 12A VGS = 10V, RGS = 9.
PAGE 4
1.2 15 12 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 VGS = 10V 9 6 3 0.2 0 0 0 25 50 75 100 150 125 25 50 75 100 125 150 TA, AMBIENT TEMPERATURE (oC) TA , AMBIENT TEMPERATURE (oC) Figure 1. Normalized Power Dissipation vs Ambient Temperature Figure 2. Maximum Continuous Drain Current vs Ambient Temperature 2 ZθJA, NORMALIZED THERMAL IMPEDANCE 1 0.1 DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 PDM SINGLE PULSE 0.
PAGE 5
400 50 100µs IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) 100 1ms 10 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1 10ms SINGLE PULSE TJ = MAX RATED TA = 25oC If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R ≠ 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1] 10 STARTING TJ = 25oC STARTING TJ = 150oC 1 0.1 0.1 1 10 70 0.1 1 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 5. Forward Bias Safe Operating Area Figure 6.
PAGE 6
1.10 1.2 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE VGS = VDS, ID = 250µA NORMALIZED GATE THRESHOLD VOLTAGE 1.1 1.0 0.9 0.8 0.7 ID = 250µA 1.05 1.00 0.95 0.90 0.6 -80 -40 0 40 80 120 -80 160 -40 TJ, JUNCTION TEMPERATURE (oC) Figure 11. Normalized Gate Threshold Voltage vs Junction Temperature 40 80 120 160 Figure 12.
PAGE 7
BVDSS VDS tP VDS L IAS VDD VARY tP TO OBTAIN REQUIRED PEAK IAS + RG VDD - VGS DUT tP IAS 0V 0 0.01Ω tAV Figure 15. Unclamped Energy Test Circuit Figure 16. Unclamped Energy Waveforms VDS VDD Qg(TOT) VDS L VGS = 10V VGS + VDD VGS - VGS = 2V DUT Qgs2 0 Ig(REF) Qg(TH) Qgs Qgd Ig(REF) 0 Figure 17. Gate Charge Test Circuit Figure 18.
PAGE 8
maximum transient thermal impedance curve. The maximum rated junction temperature, TJM, and the thermal resistance of the heat dissipating path determines the maximum allowable device power dissipation, PDM, in an application. Therefore the application’s ambient temperature, TA (oC), and thermal resistance RθJA (oC/W) must be reviewed to ensure that TJM is never exceeded. Equation 1 mathematically represents the relationship and serves as the basis for establishing the rating of the part.
PAGE 9
rev June 2005 LDRAIN DPLCAP 10 Dbody 7 5 DbodyMOD Dbreak 5 11 DbreakMOD Dplcap 10 5 DplcapMOD RLDRAIN RSLC1 51 RSLC2 5 51 Ebreak 11 7 17 18 67 Eds 14 8 5 8 1 Egs 13 8 6 8 1 Esg 6 10 6 8 1 Evthres 6 21 19 8 1 Evtemp 20 6 18 22 1 EVTHRES + 19 8 + LGATE GATE 1 Lgate 1 9 1.23e-9 Ldrain 2 5 1.0e-9 Lsource 3 7 0.18e-9 11 + 17 EBREAK 18 - 50 RDRAIN 6 8 ESG DBREAK ESLC - It 8 17 1 DRAIN 2 5 + .SUBCKT FDS5672 2 1 3 ; Ca 12 8 7e-10 Cb 15 14 7e-10 Cin 6 8 2.
PAGE 10
REV June 2005 ttemplate FDS5672 n2,n1,n3 electrical n2,n1,n3 { var i iscl dp..model dbodymod = (isl=4.5e-12,rs=4.7e-3,trs1=1.5e-3,trs2=2e-5,cjo=1.6e-9,m=0.55,tt=1.8e-8,xti=3.0) dp..model dbreakmod = (rs=2.5,trs1=1e-4,trs2=1e-6) dp..model dplcapmod = (cjo=6.0e-10,isl=10.0e-30,nl=10,m=0.45) m..model mmedmod = (type=_n,vto=3.35,kp=4,is=1e-30, tox=1) m..model mstrongmod = (type=_n,vto=3.93,kp=50,is=1e-30, tox=1) m..model mweakmod = (type=_n,vto=2.82,kp=0.04,is=1e-30, tox=1,rs=0.1) sw_vcsp..
PAGE 11
th REV June 2005 JUNCTION FDS5672_JA Junction Ambient Copper Area = 1sq.in CTHERM1 TH 8 2e-3 CTHERM2 8 7 5e-3 CTHERM3 7 6 1e-2 CTHERM4 6 5 4e-2 CTHERM5 5 4 9e-2 CTHERM6 4 3 2e-1 CTHERM7 3 2 1 CTHERM8 2 TL 3 RTHERM1 CTHERM1 8 RTHERM2 CTHERM2 7 RTHERM1 TH 8 1e-1 RTHERM2 8 7 5e-1 RTHERM3 7 6 1 RTHERM4 6 5 5 RTHERM5 5 4 8 RTHERM6 4 3 12 RTHERM7 3 2 18 RTHERM8 2 TL 25 RTHERM3 CTHERM3 6 RTHERM4 CTHERM4 SABER Thermal Model 5 SABER thermal model FDS5672 Copper Area = 1sq.
PAGE 12
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