Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDS6912A, MOSFET

November 2001

2001 Fairchild Semiconductor Corporation

FDS6812A Rev B (W)

FDS6812A

Dual N-Channel Logic Level PWM Optimized PowerTrench



MOSFET

General Description

These N-Channel Logic Level MOSFETs are produced

using Fairchild Semiconductor’s advanced

PowerTrench process that has been especially tailored

to minimize the on-state resistance and yet maintain

superior switching performance.

These devices are well suited for low voltage and

battery powered applications where low in-line power

loss and fast switching are required.

Features

• 6.7 A, 20 V. R

DS(ON)

= 22 mΩ @ V

= 4.5 V

DS(ON)

= 35 mΩ @ V

= 2.5 V

• Low gate charge (12 nC typical)

• High performance trench technology for extremely

low R

DS(ON)

• High power and current handling capability

SO-8

Pin 1

SO-8

Absolute Maximum Ratings T

=25

C unless otherwise noted

Symbol Parameter Ratings Units

DSS

Drain-Source Voltage 20 V

GSS

Gate-Source Voltage

± 12

Drain Current – Continuous (Note 1a) 6.7 A

– Pulsed 35

Power Dissipation for Dual Operation 2

Power Dissipation for Single Operation (Note 1a) 1.6

(Note 1b)

(Note 1c)

0.9

, T

STG

Operating and Storage Junction Temperature Range –55 to +150

°C

Thermal Characteristics

θJA

Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W

θJC

Thermal Resistance, Junction-to-Case (Note 1) 40

°C/W

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

FDS6812A FDS6812A 13’’ 12mm 2500 units

FDS6812A

Summary of content (5 pages)

PAGE 1
FDS6812A Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET General Description Features These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. • 6.7 A, 20 V.
PAGE 2
Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C 20 Typ Max Units Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current IGSSF IGSSR V mV/°C 14 1 10 µA Gate–Body Leakage, Forward VDS = 16 V, VGS = 0 V VDS = 16 V, VGS = 0 V, TJ = 55°C VGS = 12 V, VDS = 0 V 100 nA Gate–Body Leakage, Reverse VGS = –12 V, VDS = 0 V –100 nA
PAGE 3
FDS6812A Typical Characteristics 2.5 30 ID, DRAIN CURRENT (A) 3.0V 3.5V 25 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 4.5V 2.5V 2.0V 20 15 10 5 2 VGS = 2.0V 1.5 2.5V 3.0V 3.5V 0 0.5 1 1.5 2 2.5 0 3 5 10 15 20 25 30 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.07 1.8 ID = 6.7A VGS = 4.5V 1.6 ID = 3.
PAGE 4
FDS6812A Typical Characteristics 1800 ID = 6.7A VDS = 5V 10V 4 f = 1MHz VGS = 0 V 1500 CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 5 15V 3 2 CISS 1200 900 600 COSS 1 300 CRSS 0 0 0 2 4 6 8 10 12 14 0 4 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. P(pk), PEAK TRANSIENT POWER (W) ID, DRAIN CURRENT (A) 16 20 50 100µ 1ms 10ms RDS(ON) LIMIT 100ms 1s 10s DC 1 VGS = 4.5V SINGLE PULSE RθJA = 135oC/W 0.1 o TA = 25 C 0.01 0.01 0.
PAGE 5
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