Datasheet

FDZ371PZ P-Channel 1.5 V Specified PowerTrench
®
Thin
WL-CSP MOSFET
www.fairchildsemi.com
2
©2009 Fairchild Semiconductor Corporation
FDZ371PZ Rev.C1
Electrical Characteristics
T
J
= 25 °C unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Symbol Parameter Test Conditions Min Typ Max Units
BV
DSS
Drain to Source Breakdown Voltage I
D
= -250 µA, V
GS
= 0 V -20 V
∆BV
DSS
∆T
J
Breakdown Voltage Temperature
Coefficient
I
D
= -250 µA, referenced to 25 °C 22 mV/°C
I
DSS
Zero Gate Voltage Drain Current V
DS
= -16 V, V
GS
= 0 V -1 µA
I
GSS
Gate to Source Leakage Current V
GS
= ±8 V, V
DS
= 0 V ±10 µA
V
GS(th)
Gate to Source Threshold Voltage V
GS
= V
DS
, I
D
= -250 µA-0.35-0.6-1.0V
∆V
GS(th)
∆T
J
Gate to Source Threshold Voltage
Temperature Coefficient
I
D
= -250 µA, referenced to 25 °C -4 mV/°C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= -4.5 V, I
D
= -2.0 A 55 75
mΩ
V
GS
= -2.5 V, I
D
= -1.5A 65 90
V
GS
= -1.8 V, I
D
= -1.0 A 80 110
V
GS
= -1.5 V, I
D
= -1.0 A 100 150
V
GS
= -4.5 V, I
D
= -2.0 A,
T
J
=125°C
80 124
g
FS
Forward Transconductance V
DD
= -5 V, I
D
= -3.3 A 14 S
C
iss
Input Capacitance
V
DS
= -10 V, V
GS
= 0 V,
f = 1 MHz
750 1000 pF
C
oss
Output Capacitance 110 145 pF
C
rss
Reverse Transfer Capacitance 100 150 pF
t
d(on)
Turn-On Delay Time
V
DD
= -10 V, I
D
= -3.3 A,
V
GS
= -4.5 V, R
GEN
= 6 Ω
5.9 12 ns
t
r
Rise Time 9.1 18 ns
t
d(off)
Turn-Off Delay Time 124 198 ns
t
f
Fall Time 88 140 ns
Q
g
Total Gate Charge
V
GS
= -4.5 V, V
DD
= -10 V,
I
D
= -3.3 A
12 17 nC
Q
gs
Gate to Source Charge 1.1 nC
Q
gd
Gate to Drain “Miller” Charge 3.4 nC
I
S
Maximum Continuous Drain-Source Diode Forward Current -1.1 A
V
SD
Source to Drain Diode Forward Voltage V
GS
= 0 V, I
S
= -1.3 A (Note 2) -0.7 -1.2 V
t
rr
Reverse Recovery Time
I
F
= -3.3 A, di/dt = 100 A/µs
61 98 ns
Q
rr
Reverse Recovery Charge 29 47 nC
Notes:
1. R
θJA
is determined with the device mounted on a 1 in
2
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJC
is guaranteed by design while R
θCA
is determined by
the user's board design.
2. Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection ESD. No gate overvoltage rating is implied.
a. 75 °C/W when mounted on
a 1 in
2
pad of 2 oz copper.
b. 260 °C/W when mounted on a
minimum pad of 2 oz copper.