Datasheet

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February 2008

FMS6403 • Rev. 1.0.4

FMS6403 — Triple Video Drivers with Selectable HD/PS/SD Bypass Filters for RGB and YPbPr Signals

FMS6403

Triple Video Drivers with Selectable HD/PS/SD

Bypass Filters for RGB and YPbPr Signals

Features

 Three Video Anti-aliasing or Reconstruction Filters

 2:1 MUX Inputs for YPbPr and RGB Inputs

 Supports D1, D2, D3, and D4 Video D-connector

(EIAJ CP-4120)

 Selectable 8MHz/15MHz/30MHz 6th-order Filters,

Plus Bypass

 Works with SD (480i), Progressive (480p), and HD

(1080i/ 720p)

 AC-coupled Inputs Include DC Restore / Bias

Circuitry

 All Outputs Can Drive AC- or DC-Coupled

75Ω Loads and Provide Either 0dB or 6dB of Gain

 0.40% Differential Gain, 0.25° Differential Phase

 TSSOP-20 Packaging

Applications

 Progressive Scan

 Cable Set-top Boxes

 Home Theaters

 Satellite Set-top Boxes

 DVD Players

 HDTV

 Personal Video Recorders (PVR)

 Video On Demand (VOD)

Description

The FMS6403 offers comprehensive filtering for TV,

set-top box, or DVD applications. This part consists of a

triple, sixth-order filter with selectable 30MHz, 15MHz,

or 8MHz cutoff frequency. The filters may also be

bypassed so that the bandwidth is limited only by the

output amplifiers.

A 2:1 multiplexer is provided on each filter channel. The

triple filters are intended for YPbPr and RGB signals.

The DC clamp levels are set according to the RGB_SEL

control input. YPbPr sync tips are clamped to 250mV,

1.125V, and 1.125V, respectively; while RGB sync tips

are all clamped to 250mV. Sync clamp timing can be

derived from the Y/G inputs or from the external

SYNC_IN pin. The 8MHz and 15MHz filter settings

support bi-level sync, while the 30MHz filter setting and

bypass mode support tri-level sync.

All channels nominally accept AC-coupled 1V

signals.

Selectable 0dB or 6dB gain allows the outputs to drive

or 2V

signals into AC- or DC-coupled terminated

loads with a 1V

input. Input signals cannot exceed

1.5V

and outputs cannot exceed 2.5V

Ordering Information

Part Number

Operating

Temperature

Range

Package Packing Method

FSM6403MTC 0 to 70°C

20-Lead, Thin Shrink Small Outline Package

(TSSOP)

94 Units in Tubes

FSM6403MTC20X 0 to 70°C

20-Lead, Thin Shrink Small Outline Package

(TSSOP)

2500 Unit Tape and

Reel

All packages are lead free per JEDEC: J-STD-020B standard.

Summary of content (14 pages)

PAGE 1
FMS6403 Triple Video Drivers with Selectable HD/PS/SD Bypass Filters for RGB and YPbPr Signals Features Description Three Video Anti-aliasing or Reconstruction Filters Selectable 8MHz/15MHz/30MHz 6th-order Filters, Plus Bypass The FMS6403 offers comprehensive filtering for TV, set-top box, or DVD applications. This part consists of a triple, sixth-order filter with selectable 30MHz, 15MHz, or 8MHz cutoff frequency.
PAGE 2
Figure 1. Block Diagram Typical Application FMS6403 — Triple Video Drivers with Selectable HD/PS/SD Bypass Filters for RGB and YPbPr Signals Functional Block Diagram Figure 2. Typical Application Circuit © 2005 Fairchild Semiconductor Corporation FMS6403 • Rev. 1.0.4 www.fairchildsemi.
PAGE 3
Figure 3. Pin Configuration Pin Definitions Pin # Name Type Description 1 EXT_SYNC Input Selects the external SYNC_IN signal when set to logic 1; do not float. 2 RGB_SEL Input Selects RGB clamp levels when set to logic 1. YPbPr clamps levels when set to logic 0; do not float. 3 Y1/G1 Input Y or G input 1 - may be connected to a signal that includes sync. 4 Y2/G2 Input Y or G input 2 - may be connected to a signal that includes sync. 5 Pb1/B1 Input Pb or B input 1.
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Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit V VCC DC Supply Voltage -0.3 +6.6 VIO Analog and Digital I/O -0.3 VCC + 0.
PAGE 5
TA=25°C, VI=1VPP, VCC=5.0V; all inputs AC coupled with 0.1µF; all outputs AC coupled into 150Ω; referenced to 400kHz; unless otherwise noted. Symbol Parameter Conditions (2) ICC Supply Current VI Input Voltage Maximum VCC, no load (2) VIL Digital Input Low VIH Digital Input High Min. (2) Typ. Max. Units 90 130 mA 1.5 VPP FSELO, FSEL1, RGB_SEL, 0dB_SEL, EXT_SYNC, IN2_SEL, SYNC_IN 0 0.8 V FSELO, FSEL1, RGB_SEL, 0dB_SEL, EXT_SYNC, IN2_SEL, SYNC_IN 2.
PAGE 6
TA=25°C, VI=1VPP, VCC=5.0V, FSEL0=1, FSEL1=0, 0dB_SEL=0 (gain=6dB), RSOURCE=37.5Ω; all inputs AC coupled with 0.1µF; all outputs AC coupled with 220µF into 150Ω referenced to 400kHz; unless otherwise noted. Symbol AVPS Parameter Conditions PS Gain, 0dB_SEL=0 (4) PS Gain, 0dB_SEL=1 (4) (4) Min. Typ. Max. Units All Channels PS Mode 5.6 6.0 6.4 dB All Channels PS Mode -0.4 0 0.
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TA=25°C, VI=1VPP, VCC=5.0V, FSEL0=0, FSEL1=0, 0dB_SEL=0 (gain=6dB), RSOURCE=37.5Ω; all inputs AC coupled with 0.1μF; all outputs AC coupled with 220μF into 150Ω, referenced to 400kHz; unless otherwise noted. Figure 4. SD Frequency Response Figure 5. SD Group Delay vs. Frequency Figure 6. SD Noise vs. Frequency Figure 7. SD Differential Gain FMS6403 — Triple Video Drivers with Selectable HD/PS/SD Bypass Filters for RGB and YPbPr Signals Typical Performance Characteristics Figure 8.
PAGE 8
TA=25°C, VI=1VPP, VCC=5.0V, FSEL0=1, FSEL1=0, 0dB_SEL=0 (gain=6dB), RSOURCE=37.5Ω; all inputs AC coupled with 0.1μF; all outputs AC coupled with 220μF into 150Ω, referenced to 400kHz; unless otherwise noted. Figure 9. PS Frequency Response Figure 10. PS Group Delay vs. Frequency High-Definition Typical Performance Characteristics TA=25°C, VI=1VPP, VCC = 5.0V, FSEL0=0, FSEL1=1, 0dB_SEL=0 (gain=6dB), RSOURCE=37.5Ω; all inputs AC coupled with 0.
PAGE 9
applied to the SYNC_IN pin. When there is no video signal on the video inputs, SYNC_IN can be a sync pulse every 60μs to mimic the slowest sync in a regular video signal. The following two sections discuss the sync processing and timing required in more detail. Introduction The FMS6403 is a next-generation filter solution from Fairchild Semiconductor addressing the expanding filtering needs for televisions, set-top boxes, and DVD players, including progressive scan capability.
PAGE 10
Normally, the FMS6403 responds to bi-level sync and clamps the sync tip during period ‘B’ in Figure 19. When the filters are switched to high-definition mode (30MHz) or bypass mode, the sync processing responds to trilevel sync and clamps to the blanking level during period ‘C’ in Figure 19. Note: 9. The diagram indicates SYNC timings at the output pin. Figure 16.
PAGE 11
Format Refresh Sample Rate Period (T) A B C H-Rate 480i 30Hz 13.5MHz 74ns 20T=1.5µs 64T=4.7µs 61T=4.5µs 15.75kHz 480p 60Hz 27 MHz 37ns 20T=750ns 64T=2.35µs 61T=2.25µs 31.5kHz 720p 60Hz 74.25 MHz 13.4ns 70T=938ns 40T=536ns 220T=2.95ns 45kHz 1080i 30Hz 74.25 MHz 13.4ns 20T=589ns 44T=589ns 148T=1.98ns 33.75kHz 1080p 60Hz 148.5 MHz 6.7ns 20T=596ns 44T=296ns 148T=996ns 67.5kHz Note: 10. Timing values are approximate for 30Hz/60Hz refresh rates. Table 2.
PAGE 12
calculate the FMS6403’s power dissipation and internal temperature rise: Input Circuitry The DC restore circuit requires a source impedance (RSOURCE = RS || RT) of less than or equal to 150Ω for correct operation. Driving the FMS6403 with a highimpedance source (e.g. a DAC loaded with 330Ω) does not yield optimum results. Refer Figure 2 for details. TJ = TA + Pd ΘJA where: PD = PCH1 + PCH2 + PCH3 and: 2 PCHx = VS • ICH - (VO /RL) where: VO = 2VIN + 0.
PAGE 13
Figure 20. 20-lead Thin Shrink Small Outline Package (TSSOP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 14
FMS6403 — Triple Video Drivers with Selectable HD/PS/SD Bypass Filters for RGB and YPbPr Signals 14 www.fairchildsemi.com © 2005 Fairchild Semiconductor Corporation FMS6403 • Rev. 1.0.