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FOD8320 — High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar

Wide Body SOP 5-Pin

FOD8320 Rev. 1.0.6

May 2012

FOD8320

High Noise Immunity, 2.5A Output Current, Gate Drive

Optocoupler in Optoplanar

Wide Body SOP 5-Pin

Features

■

Fairchild’s Optoplanar

packaging technology

provides reliable and high voltage insulation with

greater than 10mm creepage and clearance distance,

and 0.5mm internal insulation distance while still

offering a compact footprint

■

2.5A output current driving capability for medium

power IGBT/MOSFET

– Use of P-Channel MOSFETs at output stage

enables output voltage swing close to the supply

rail

■

35kV/µs Minimum Common Mode Rejection

■

Wide Supply Voltage range from 15V to 30V

■

Fast Switching Speed over full operating temperature

range

– 400ns max. propagation delay

– 100ns max. pulse width distortion

■

UnderVoltage LockOut (UVLO) with hysteresis

■

Extended industrial temperate range, -40 to 100°C

temperature range

■

Safety and regulatory approvals

– UL1577, 5,000V

RMS

for 1 min.

– DIN EN/IEC60747-5-5, 1,414V peak working

insulation voltage

Applications

■

AC and brushless DC motor drives

■

Industrial inverter

■

Uninterruptible power supply

■

Induction heating

■

Isolated IGBT/Power MOSFET gate drive

Related Resources

■

FOD3120, High Noise Immunity, 2.5A Output Current,

Gate Drive Optocoupler Datasheet

Description

The FOD8320 is a 2.5A Output Current Gate Drive

Optocoupler, capable of driving medium power IGBT/

MOSFETs. It is ideally suited for fast switching driving of

power IGBT and MOSFETs used in motor control

inverter applications, and high performance power

systems.

It utilizes Fairchild’s coplanar packaging technology,

Optoplanar

, and optimized IC design to achieve reliably

high insulation voltage and high noise immunity.

It consists of a aluminum gallium arsenide (AlGaAs) light

emitting diode optically coupled to an integrated circuit

with a high-speed driver for push-pull MOSFET output

stage. The device is housed in a wide body 5-pin small

outline plastic package.

Functional Schematic

ANODE

CATHODE V

Summary of content (19 pages)

PAGE 1
FOD8320 High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin Features ■ Fairchild’s ■ ■ ■ ■ ■ ■ ■ Description Optoplanar® packaging technology provides reliable and high voltage insulation with greater than 10mm creepage and clearance distance, and 0.5mm internal insulation distance while still offering a compact footprint 2.
PAGE 2
VDD–VSS “Positive Going” (Turn-on) LED VDD–VSS “Positive Going” (Turn-off) VO Off 0V to 30V 0V to 30V Low On 0V to 11.5V 0V to 10V Low On 11.5V to 14.5V 10V to 13V Transition On 14.5V to 30V 13V to 30V High Pin Definitions Pin # Name 1 Anode 3 Cathode Description LED Anode LED Cathode 4 VSS Negative Supply Voltage 5 VO Output Voltage 6 VDD Positive Supply voltage Pin Configuration 1 6 ANODE CATHODE ©2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.
PAGE 3
Symbol Parameter Min. Typ. Max. Unit Installation Classifications per DIN VDE 0110/1.89 Table 1 For Rated Mains Voltage < 150Vrms I–IV For Rated Mains Voltage < 300Vrms I–IV For Rated Mains Voltage < 450Vrms I–IIII For Rated Mains Voltage < 600Vrms I–III Climatic Classification 40/100/21 Pollution Degree (DIN VDE 0110/1.89) 2 CTI Comparative Tracking Index 175 VPR Input to Output Test Voltage, Method b, VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec.
PAGE 4
Symbol Parameter Value Units TSTG Storage Temperature -40 to +125 °C TOPR Operating Temperature -40 to +100 °C Junction Temperature -40 to +125 °C 260 for 10 sec °C TJ TSOL Lead Solder Temperature (Refer to Reflow Temperature Profile) IF(AVG) Average Input Current 25 mA F Operating Frequency 50 kHz VR Reverse Input Voltage 5.0 V IO(PEAK) Peak Output Current(1) 3.
PAGE 5
Apply over all recommended conditions, typical value is measured at TA = 25ºC Symbol Parameter Conditions Min. VISO Input-Output Isolation Voltage TA = 25ºC, R.H. < 50%, t = 1.0min, II-O ≤ 20µA, 50Hz(5)(6) RISO Isolation Resistance VI-O = 500V(5) CISO Isolation Capacitance VI-O = 0V, Freq = Typ. Max. 5,000 1.0MHz(6) Units VRMS 1011 Ω 1 pF Notes: 5. Device is considered a two terminal device: Pins 1 and 3 are shorted together and Pins 4, 5 and 6 are shorted together. 6.
PAGE 6
Apply over all recommended conditions, typical value is measured at VDD = 30V, VSS = Ground, TA = 25°C unless otherwise specified. Symbol Parameter tPHL Propagation Delay Time to Logic Low Output(9) tPLH Propagation Delay Time to Logic High Output(10) PWD Pulse Width Distortion(11) |tPHL – tPLH| PDD (Skew) Conditions IF = 7mA to 16mA, Rg = 10Ω, Cg =10nF, f = 10kHz, Duty Cycle = 50% Propagation Delay Difference Between Any Two Parts(12) Min. Typ. Max.
PAGE 7
Figure 2. Output High Voltage Drop vs. Ambient Temperature 0 VOH–VDD – OUTPUT HIGH VOLTAGE DROP (V) VOH – V DD – OUTPUT HIGH VOLTAGE DROP (V) Figure 1. Output High Voltage Drop vs. Output High Current -0.5 -1.0 -1.5 TA = -40°C -2.0 25°C -2.5 100°C -3.0 VDD = 15V to 30V VSS = 0V IF = 7mA to 16mA f = 200Hz 0.2% Duty Cycle -3.5 -4.0 0 0.5 1.0 1.5 2.0 2.5 0 -0.05 -0.10 -0.15 -0.20 VDD = 15V to 30V VSS = 0V IF = 7mA to 16mA IO = -100mA -0.25 -0.
PAGE 8
Figure 7. Supply Current vs. Ambient Temperature Figure 8. Supply Current vs. Supply Voltage 3.6 VDD = 30V VSS = 0V IF = 10mA (for IDDH) IF = 0mA (for IDDL) 3.2 IDD – SUPPLY CURRENT (mA) IDD – SUPPLY CURRENT (mA) 3.6 IDDH 2.8 IDDL 2.4 2.0 -40 -20 0 20 40 60 80 IF = 10mA (for IDDH) IF = 0mA (for IDDL) VSS = 0V TA = 25°C 3.2 IDDH 2.8 IDDL 2.4 2.0 15 100 20 TA – AMBIENT TEMPERATURE (°C) Figure 9. Low to High Input Current Threshold vs.
PAGE 9
Figure 14. Propagation Delay vs. Load Capacitance 500 VDD = 30V VSS = 0V IF = 10mA f = 10kHz 50% Duty Cycle 400 Cg = 10nF TA = 25°C VDD = 30V VSS = 0V IF = 10mA f = 10kHz 50% Duty Cycle 400 Rg = 10Ω TA = 25°C tP – PROPAGATION DELAY (ns) tP – PROPAGATION DELAY (ns) Figure 13. Propagation Delay vs. Series Load Resistance 500 tPHL 300 tPLH 200 100 0 10 20 30 40 tPLH 200 100 50 tPHL 300 0 20 Rg – SERIES LOAD RESISTANCE (Ω) Figure 15.
PAGE 10
Power Supply + + C1 0.1μF Pulse Generator PW = 4.99ms Period = 5ms ROUT = 50Ω VDD = 15V to 30V C2 47μF Pulse-In 1 6 IOL R2 100Ω Power Supply + 5 D1 VOL 3 + C3 0.1μF V = 6V C4 47μF 4 LED-IFmon To Scope R1 100Ω Test Conditions: Frequency = 200Hz Duty Cycle = 99.8% VDD = 15V to 30V VSS = 0V IF = 0mA Figure 18. IOL Test Circuit Power Supply + + C1 0.
PAGE 11
1 6 0.1μF + – VO 5 IF = 7 to 16mA VDD = 15 to 30V 100mA 3 4 Figure 20. VOH Test Circuit 1 6 0.1μF 5 3 100mA VO + – VDD = 15 to 30V 4 Figure 21. VOL Test Circuit ©2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.6 www.fairchildsemi.com 11 FOD8320 — High Noise Immunity, 2.
PAGE 12
6 1 0.1μF IF = 7 to 16mA VO 5 3 + – VDD = 30V + – VDD = 30V 4 Figure 22. IDDH Test Circuit 6 1 0.1μF + – 5 VF = -3.0 to 0.8V VO 4 3 Figure 23. IDDL Test Circuit ©2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.6 www.fairchildsemi.com 12 FOD8320 — High Noise Immunity, 2.
PAGE 13
6 1 0.1μF VO > 5V 5 + – VDD = 15 to 30V + – VDD = 15 to 30V IF 3 4 Figure 24. IFLH Test Circuit 1 6 0.1μF + – VO 5 VF = –3.0 to 0.8V 3 4 Figure 25. VFHL Test Circuit 1 6 0.1μF IF = 10mA 5 3 VO = 5V + – 15V or 30V VDD Ramp 4 Figure 26. UVLO Test Circuit ©2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.6 www.fairchildsemi.com 13 FOD8320 — High Noise Immunity, 2.
PAGE 14
6 1 0.1μF 5 VO + – Rg = 10Ω Probe f = 10KHz DC = 50% 3 4 + – VDD = 15 to 30V + – VDD = 30V Cg = 10nF 50Ω IF tR tF 90% 50% VOUT 10% tPLH tPHL Figure 27. tPHL, tPLH, tR and tF Test Circuit and Waveforms IF A 6 1 B 5V 0.1μF + – 5 3 VO 4 +– VCM = 2,000V VCM 0V Δt VO VOH Switch at A: IF = 10mA VO VOL Switch at B: IF = 0mA Figure 28. CMR Test Circuit and Waveforms ©2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.6 www.fairchildsemi.
PAGE 15
Part Number Package Packing Method FOD8320 Wide Body SOP 5-Pin Tube (100 units per tube) FOD8320R2 Wide Body SOP 5-Pin Tape and Reel (1,000 units per reel) FOD8320V Wide Body SOP 5-Pin, DIN EN/IEC60747-5-5 Option Tube (100 units per tube) FOD8320R2V Wide Body SOP 5-Pin, DIN EN/ IEC60747-5-5 Option Tape and Reel (1,000 units per reel) All packages are lead free per JEDEC: J-STD-020B standard.
PAGE 16
FOD8320 — High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin Reflow Profile Temperature (°C) TP 260 240 TL 220 200 180 160 140 120 100 80 60 40 20 0 Max. Ramp-up Rate = 3°C/S Max. Ramp-down Rate = 6°C/S tP Tsmax tL Preheat Area Tsmin ts 120 240 360 Time 25°C to Peak Time (seconds) Profile Freature Pb-Free Assembly Profile Temperature Min. (Tsmin) 150°C Temperature Max.
PAGE 17
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.
PAGE 18
Do t Po P2 E F d W1 W Bo K1 Ko P Ao User Direction of Feed Symbol W t Description Tape Width Dimmension in mm 24.00 + 0.20 / -0.10 Tape Thickness 0.30 ± 0.05 Po Sprocket Hole Pitch Do Sprocket Hole Diameter 1.50 + 0.10 / -0.00 D1 Pocket Hole Diameter 1.50 + 0.25 / -0.00 4.00 ± 0.20 E Sprocket Hole Location 1.75 ± 0.10 F Pocket Location 11.50 ± 0.10 P2 2.00 ± 0.10 P Pocket Pitch 8.00 ± 0.10 Ao Pocket Dimension 4.50 ± 0.10 Bo 12.00 ± 0.10 Ko 3.35 ± 0.10 K1 2.
PAGE 19
FOD8320 — High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin 19 www.fairchildsemi.com ©2010 Fairchild Semiconductor Corporation FOD8320 Rev. 1.0.