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FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity

FODM8071 Rev. 1.0.7

May 2010

FODM8071

3.3V/5V Logic Gate Output Optocoupler with

High Noise Immunity

Features

■

High noise immunity characterized by common mode

rejection

– 20kV/µs minimum common mode rejection

■

High speed

– 20Mbit/sec date rate (NRZ)

– 55ns max. propagation delay

– 20ns max. pulse width distortion

– 30ns max. propagation delay skew

■

3.3V and 5V CMOS compatibility

■

Speciﬁcations guaranteed over 3V to 5.5V supply

voltage and -40°C to +110°C temperature range

■

Safety and regulatory approvals

– UL1577, 3750 VAC

RMS

for 1 min.

– IEC60747-5-2 (pending)

Applications

■

Microprocessor system interface

– SPI, I

■

Industrial fieldbus communications

– DeviceNet, CAN, RS485

■

Programmable logic control

■

Isolated data acquisition system

■

Voltage level translator

Description

The FODM8071 is a 3.3V/5V high-speed logic gate

output Optocoupler, which supports isolated communi-

cations allowing digital signals to communicate between

systems without conducting ground loops or hazardous

This high-speed logic gate output optocoupler, housed in

a compact 5-Pin Mini-Flat package, consists of a high-

speed AlGaAs LED at the input coupled to a CMOS

detector IC at the output. The detector IC comprises an

integrated photodiode, a high-speed transimpedance

amplifier and a voltage comparator with an output driver.

The CMOS technology coupled with a high efficiency

LED achieves low power consumption as well as very

high speed (55ns propagation delay, 20ns pulse width

distortion).

Related Resources

■

www.fairchildsemi.com/products/opto/

■

www.fairchildsemi.com/pf/FO/FOD8001.html

■

www.fairchildsemi.com/pf/FO/FOD0721.html

Functional Schematic

3 4

GND

ANODE

CATHODE

Truth Table

LED Output

Off High

On Low

voltages. It utilizes Fairchild’s proprietary coplanar pack-

aging technology, Optoplanar

, and optimized IC design

to achieve high noise immunity, characterized by high

common mode rejection specifications.

Summary of content (13 pages)

PAGE 1
FODM8071 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Features Description ■ High noise immunity characterized by common mode The FODM8071 is a 3.3V/5V high-speed logic gate output Optocoupler, which supports isolated communications allowing digital signals to communicate between systems without conducting ground loops or hazardous voltages.
PAGE 2
Number Name 1 ANODE 3 CATHODE 4 GND Function Description Anode Cathode Output Ground 5 VO Output Voltage 6 VDD Output Supply Voltage Safety and Insulation Ratings for Mini-Flat Package (SO5 Pin) As per IEC60747-5-2 (Pending Certification). This optocoupler is suitable for “safe electrical insulation” only within the safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits. Symbol Parameter Min. Typ. Max.
PAGE 3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. .
PAGE 4
Symbol Parameter Test Conditions Min. Typ. Max. Units 1.05 1.35 1.8 V 5 15 INPUT CHARACTERISTICS VF Forward Voltage IF = 10mA, Fig. 1 BVR Input Reverse Breakdown Voltage IR = 10µA IFHL Threshold Input Current Fig. 2 2.8 5 mA VDD = 3.3V, IF = 10mA, Fig. 3, 5 3.3 4.8 mA VDD = 5.0V, IF = 10mA, Fig. 3, 6 4.0 5.0 mA V OUTPUT CHARACTERISTICS IDDL IDDH VOH VOL Logic Low Output Supply Current Logic High Output Supply Current VDD = 3.3V, IF = 0mA, Fig. 4 3.3 4.8 mA VDD = 5.
PAGE 5
(TA = -40ºC to +110ºC, 3.0V ≤ VDD ≤ 5.5V, IF = 5mA), unless otherwise specified. Typical value is measured at TA = 25ºC and VDD = 3.3V Symbol Parameter Test Conditions Min. Typ. Date Rate(7) Max. Units 20 Mbps tPW Pulse Width tPHL Propagation Delay Time to Logic Low Output CL = 15pF, Fig. 7, 8, 12 50 31 55 ns ns tPLH Propagation Delay Time to Logic High Output CL = 15pF, Fig. 7, 8, 12 25 55 ns PWD Pulse Width Distortion, | tPHL - tPLH| CL = 15pF, Fig. 9, 10 5.
PAGE 6
Fig. 2 Input Threshold Current vs. Ambient Temperature Fig. 1 Input Forward Current vs. Forward Voltage 4.0 IFHL – INPUT THRESHOLD CURRENT (mA) IF – INPUT FORWARD CURRENT (mA) 100 10 1 0.1 TA = 110°C 0.01 0.8 0.9 TA = 25°C TA = -40°C 1.0 1.1 1.2 1.3 1.4 VF – FORWARD VOLTAGE (V) 1.5 3.5 VDD = 5.0V 3.0 VDD = 3.3V 2.5 2.0 -40 1.6 IDDH – LOGIC HIGH OUTPUT SUPPLY CURRENT (mA) IDDL – LOGIC LOW OUTPUT SUPPLY CURRENT (mA) IF = 10mA 4.5 V DD = 5.0V 4.0 VDD = 3.3V 3.5 3.0 2.5 2.
PAGE 7
Fig 7. Propagation Delay vs. Ambient Temperature 50 tP – PROPAGATION DELAY (ns) Frequency = 10MHz Duty Cycle = 50% IF = 5mA 45 tP – PROPAGATION DELAY (ns) Fig 8. Propagation Delay vs. Pulse Input Current 40 40 35 tPHL 30 tPHL tPLH 25 tPLH 20 Frequency = 10MHz Duty Cycle = 50% TA = 25°C 35 tPLH 30 tPLH 25 tPHL 20 tPHL 15 15 VDD = 3.3V V = 5.0V DD VDD = 3.3V VDD = 5.
PAGE 8
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Schematics VCC Pulse Gen. tf = tr = 5ns ZO = 50Ω 0.1µF Input Monitoring Node VO Monitoring Node CL = 15pF RIN IF = 5mA 50% Input tPHL tPLH tf Output tr 90% 90% 50% 10% VOL 10% Figure 12. Test Circuit for Propagation Delay Time, Rise Time and Fall Time IF VDD 0.1µF Bypass A Output (Vo) B VFF VCM Pulse Gen VCM GND VOH Switching Pos. (A), IF = 0 CMH 0.8 x VDD 0.8V VOL Switching Pos. (B), IF = 5mA CML Figure 13.
PAGE 9
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Package Dimensions Notes: 1. No standard applies to this package. 2. All dimensions are in millimeters. 3. Dimensions are exclusive of burrs, mold flash, and tie bar extrusion. 4. Drawings filesname and revision: MKT-MFP05A. Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice.
PAGE 10
Option Order Entry Identifier No Suffix FODM8071 R2 FODM8071R2 Description Mini-Flat 5-pin, shipped in tubes (100 units per tube) Mini-Flat 5-pin, tape and reel (2,500 units per reel) All packages are lead free per JEDEC: J-STD-020B standard. Marking Information 1 V 3 M8071 2 X YY M 6 4 5 Definitions 1 Fairchild logo 2 Device number 3 IEC60747-5-2 (VDE marking) 4 One digit year code, e.g.
PAGE 11
K0 P2 P0 t D0 E A0 W1 W B0 d F D1 P 2.54 Pitch Symbol Dimensions (mm) Tape Width W 12.00 +0.30 / -0.10 Tape Thickness t 0.30 ±0.05 Sprocket Hole Pitch P0 4.00 ±0.10 Sprocket Hole Diameter Description D0 1.50 +0.10 / -0.0 Sprocket Hole Location E 1.75 ±0.10 Pocket Location F 5.50 ±0.10 P2 2.00 ±0.10 Pocket Pitch P 8.00 ±0.10 Pocket Dimension A0 4.40 ±0.10 Pocket Hole Diameter B0 7.30 ±0.10 K0 2.30 ±0.10 D1 1.50 Min.
PAGE 12
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Reflow Profile Temperature (°C) TP 260 240 TL 220 200 180 160 140 120 100 80 60 40 20 0 Max. Ramp-up Rate = 3°C/S Max. Ramp-down Rate = 6°C/S tP Tsmax tL Preheat Area Tsmin ts 120 240 360 Time 25°C to Peak Time (seconds) Profile Feature Pb-Free Assembly Profile Temperature Min. (Tsmin) 150°C Temperature Max. (Tsmax) 200°C Time (tS) from (Tsmin to Tsmax) 60–120 seconds Ramp-up Rate (tL to tP) 3°C/second max.
PAGE 13
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