Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFQPF33N10L, MOSFET

November 2013

FQPF33N10L — N-Channel QFET

MOSFET

FQPF33N10L Rev. C1

www.fairchildsemi.com

FQPF33N10L

N-Channel QFET

MOSFET

100 V, 18 A, 52 mΩ

Description

This N-Channel enhancement mode power MOSFET is

produced using Fairchild Semiconductor’s proprietary

planar stripe and DMOS technology. This advanced

MOSFET technology has been especially tailored to reduce

on-state resistance, and to provide superior switching

performance and high avalanche energy strength. These

devices are suitable for switched mode power supplies,

audio amplifier, DC motor control, and variable switching

power applications.

Features

• 18 A, 100 V, R

DS(on)

= 52 mΩ (Max.) @ V

= 10 V,

= 9 A

• Low Gate Charge (Typ. 30 nC)

• Low Crss (Typ. 70 pF)

• 100% Avalanche Tested

• 175°C Maximum Junction Temperature Rating

TO-220F

Absolute Maximum Ratings T

= 25°C unless otherwise noted.

Thermal Characteristics

Symbol Parameter FQPF33N10L Unit

DSS

Drain-Source Voltage 100 V

Drain Current

- Continuous (T

= 25°C)

18 A

- Continuous (T

= 100°C)

12.7 A

Drain Current - Pulsed

(Note 1)

72 A

GSS

Gate-Source Voltage ± 20 V

Single Pulsed Avalanche Energy

(Note 2)

430 mJ

Avalanche Current

(Note 1)

18 A

Repetitive Avalanche Energy

(Note 1)

4.1 mJ

dv/dt Peak Diode Recovery dv/dt

(Note 3)

6.0 V/ns

Power Dissipation (T

= 25°C)

41 W

- Derate above 25°C 0.27 W/°C

, T

STG

Operating and Storage Temperature Range -55 to +175 °C

Maximum Lead Temperature for Soldering,

1/8" from Case for 5 seconds

300 °C

Symbol Parameter FQPF33N10L Unit

θJC

Thermal Resistance, Junction-to-Case, Max. 3.7 °C/W

θJA

Thermal Resistance, Junction-to-Ambient, Max. 62.5 °C/W

Summary of content (8 pages)

PAGE 1
FQPF33N10L N-Channel QFET® MOSFET 100 V, 18 A, 52 mΩ Description Features This N-Channel enhancement mode power MOSFET is produced using Fairchild Semiconductor’s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength.
PAGE 2
Part Number FQPF33N10L Top Mark FQPF33N10L Package TO-220F Electrical Characteristics Symbol Packing Method Tube Reel Size N/A Tape Width N/A Quantity 50 units TC = 25°C unless otherwise noted. Parameter Test Conditions Min Typ Max Unit 100 -- -- V -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 μA ΔBVDSS / ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, Referenced to 25°C -- 0.
PAGE 3
VGS 10.0 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V 1 ID, Drain Current [A] ID, Drain Current [A] Top : 10 1 10 175℃ 25℃ 0 10 -55℃ ※ Notes : 1. VDS = 30V 2. 250μ s Pulse Test ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ 0 -1 10 -1 10 0 10 1 10 0 10 2 4 6 8 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0.20 0.12 VGS = 10V 0.08 0.04 1 10 0 10 25℃ 175℃ ※ Notes : 1. VGS = 0V 2.
PAGE 4
3.0 RDS(ON), (Normalized) Drain-Source On-Resistance BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μA 0.9 0.8 -100 -50 0 50 100 150 2.5 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 16.5 A 0.5 0.0 -100 200 -50 0 50 100 150 200 o o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs.
PAGE 5
0KΩ 200nF 12V FQPF33N10L — N-Channel QFET® MOSFET VGS Same Type as DUT Qg 10V 300nF VDS VGS Qgs Qgd DUT IG = const. 3mA Charge Figure 12. Gate Charge Test Circuit & Waveform VDS RG RL VDS 90% VDD VGS VGS DUT V 10V GS 10% td(on) tr td(off) t on tf t off Figure 13. Resistive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD V 10V GS GS ID (t) VDS (t) VDD DUT tp tp Time Figure 14.
PAGE 6
+ VDS _ I SD L Driver RG VGS Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period VGS ( Driver ) 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms ©2000 Fairchild Semiconductor Corporation FQPF33N10L Rev. C1 6 www.
PAGE 7
FQPF33N10L — N-Channel QFET® MOSFET Mechanical Dimensions Figure 16. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 8
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.