Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFQT4N20LTF, MOSFET

FQT4N20L N-Channel MOSFET

FQT4N20L

SOT-223

Absolute Maximum Ratings T

= 25°C unless otherwise noted

Thermal Characteristics

Symbol Parameter FQT4N20L Unit

DSS

Drain-Source Voltage 200 V

Drain Current

- Continuous (T

= 25°C)

0.85 A

- Continuous (T

= 70°C)

0.68 A

Drain Current - Pulsed

(Note 1)

3.4 A

GSS

Gate-Source Voltage ± 20 V

Single Pulsed Avalanche Energy

(Note 2)

52 mJ

Avalanche Current

(Note 1)

0.85 A

Repetitive Avalanche Energy

(Note 1)

0.22 mJ

dv/dt Peak Diode Recovery dv/dt

(Note 3)

5.5 V/ns

Power Dissipation (T

= 25°C)

2.2 W

- Derate above 25°C 0.018 W/°C

, T

STG

Operating and Storage Temperature Range -55 to +150 °C

Maximum lead temperature for soldering purposes,

1/8" from case for 5 seconds

300 °C

Symbol Parameter Typ Max

Unit

θJA

Thermal Resistance, Junction-to-Ambient * -- 57 °C/W

* When mounted on the minimum pad size recommended (PCB Mount)

Features

This N-Channel enhancement mode power MOSFET is

produced using Fairchild Semiconductor

’s proprietary

planar stripe and DMOS technology. This advanced

MOSFET technology has been especially tailored to

reduce on-state resistance, and to provide superior

switching performance and high avalanche energy

strength. These devices are suitable for switched mode

power supplies, active power factor correction (PFC), and

electronic lamp ballasts.

•

0.85 A, 200 V, R

DS(on)

=1.35 Ω(Typ.)@V

=10 V, I

=0.425 A

•

Low Gate Charge (Typ. 4 nC)

•

Low C

rss

(Typ. 6 pF)

•

100% Avalanche Tested

N-Channel QFE

MOSFET

200 V, 0.85 A, 1.40 Ω

Description

•

Low Level Gate Drive Requirments Allowing Direct Operation

From Logic Drives

FQT4N20L Rev. C0

www.fairchildsemi.com

FQT4N20L Rev. C0

www.fairchildsemi.com

FQT4N20L Rev. C0

www.fairchildsemi.com

March 2013

Summary of content (8 pages)

PAGE 1
March 2013 N-Channel QFET® MOSFET 200 V, 0.85 A, 1.40 Ω Description Features This N-Channel enhancement mode power MOSFET is produced using Fairchild Semiconductor®’s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength.
PAGE 2
Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Unit 200 -- -- V -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS/ ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.
PAGE 3
0 ID , Drain Current [A] 10 Bottom : VGS 10 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V ID , Drain Current [A] Top : ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ 0 10 150℃ 25℃ -55℃ ※ Notes : 1. VDS = 30V 2. 250μ s Pulse Test -1 10 -1 -1 0 10 10 1 10 10 0 2 4 6 8 10 VGS , Gate-Source Voltage [V] VDS , Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2.
PAGE 4
(Continued) 3.0 1.2 BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 RDS(ON) , (Normalized) Drain-Source On-Resistance 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 0.425 A 0.5 0.0 -100 200 -50 0 50 100 150 200 o o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 1.
PAGE 5
FQT4N20L N-Channel MOSFET Gate Charge Test Circuit & Waveform 50KΩ 200nF 12V VGS Same Type as DUT Qg 5V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RG RL VDS 90% VDD VGS VGS DUT 5V 10% td(on) tr td(off) t on t off tf Unclamped Inductive Switching Test Circuit & Waveforms VDS BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L BVDSS IAS ID RG VDD DUT 10V tp ©2001 Fairchild Semiconductor Corporation FQT4N20L Rev.
PAGE 6
FQT4N20L N-Channel MOSFET Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) I SD ( DUT ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2001 Fairchild Semiconductor Corporation FQT4N20L Rev.
PAGE 7
FQT4N20L N-Channel MOSFET Package Dimensions 3.00 ±0.10 4.60 ±0.25 6.50 ±0.20 (0.89) (0.95) (0.46) 1.60 ±0.20 2.30 TYP ©2001 Fairchild Semiconductor Corporation FQT4N20L Rev. C0 0.70 ±0.10 (0.95) 7.00 ±0.30 (0.60) +0.04 0.06 –0.02 (0.60) 3.50 ±0.20 1.75 ±0.20 MAX1.80 0.65 ±0.20 0.08MAX SOT-223 ° 10 +0.10 0.25 –0.05 0°~ www.fairchildsemi.
PAGE 8
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.