Datasheet

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February 2012

FSA2258 • Rev. 1.0.5

FSA2258 — Low-Voltage Dual-SPDT (0.8



) Analog Switch with 16kV ESD

FSA2258 Low-Voltage, Dual-SPDT

(0.8) Analog Switch with 16kV ESD

Features

 0.8Ω Typical On Resistance (R

) for +3.0V Supply

 0.40Ω Maximum R

Flatness for +3.0V Supply

 -3db Bandwidth: > 50MHz

 Low I

CCT

Current Over an Expanded Control Input

Range

 Packaged in 10-Lead MicroPak™ (1.6 x 2.1mm)

 Power-Off Protection on Common Ports

 Broad V

Operating Range: 1.65V to 4.30V

 HBM JEDEC: JESD22-A114

- I/O to GND: 9kV

- Power to GND: 16kV

Applications

 Cell Phone, PDA, Digital Camera, and Notebook

 LCD Monitor, TV, and Set-Top Box

Description

The FSA2258 is a high-performance, dual, Single Pole

Double Throw (SPDT) analog switch that features low

of 0.8 (typical) at 3.0V V

. The FSA2258

operates over a wide V

range of 1.65V to 4.3V and is

designed for break-before-make operation. The select

input is TTL-level compatible.

The FSA2258 features very low quiescent current even

when the control voltage is lower than the V

supply.

This feature suits mobile handset applications by

allowing direct interface with baseband processor

general-purpose I/Os with minimal battery consumption.

IMPORTANT NOTE:

For additional information, please contact

analogswitch@fairchildsemi.com

Ordering Information

Part Number Top Mark

Operating

Temperature Range

Package

FSA2258L10X JS -40 to +85°C 10-Lead MicroPak™ 1.6 x 2.1mm, JEDEC MO-255B

Analog Symbol

1B0

1B1

2B0

2B1

Figure 1. FSA2258

Summary of content (10 pages)

PAGE 1
FSA2258 Low-Voltage, Dual-SPDT (0.8) Analog Switch with 16kV ESD Features Description     The FSA2258 is a high-performance, dual, Single Pole Double Throw (SPDT) analog switch that features low RON of 0.8 (typical) at 3.0V VCC. The FSA2258 operates over a wide VCC range of 1.65V to 4.3V and is designed for break-before-make operation. The select input is TTL-level compatible.     0.8Ω Typical On Resistance (RON) for +3.0V Supply 0.40Ω Maximum RON Flatness for +3.
PAGE 2
FSA2258 — Low-Voltage, Dual-SPDT (0.8) Analog Switch with 16kV ESD Pin Configuration Vcc 10 1B0 1 9 1A 1B1 2 8 S1 2B0 3 7 S2 2B1 4 6 2A 5 GND Figure 2.
PAGE 3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter VCC VSW Supply Voltage (1) Switch I/O Voltage (1) Min. Max. Units -0.5 5.
PAGE 4
All typical values are at 25ºC unless otherwise specified. Symbol Parameter Min. VIH Control Input Voltage HIGH TA=-40 to +85ºC TA=+25ºC VCC (V) Conditions Typ. Max. Min. 3.60 to 4.30 2.70 to 3.60 2.30 to 2.70 1.65 to 1.95 3.60 to 4.30 2.70 to 3.60 2.30 to 2.70 1.65 to 1.95 1.7 1.5 1.4 0.9 Unit Max. V 0.7 0.5 0.4 0.4 V -0.5 0.5 µA VIL Control Input Voltage LOW IIN Control Input Leakage (S1,S2) VIN=0 to VCC 1.65 to 4.
PAGE 5
All typical value are for VCC=3.3V at 25ºC unless otherwise specified. Symbol Parameter Conditions TA=-40 to +85°C TA=+25ºC VCC (V) Min. Typ. Max. tON tOFF tBBM nB0 or nB1=1.5V, RL=50Ω, CL=35pF Turn-On Time nB0 or nB1=1.5V, RL=50Ω, CL=35pF Turn-Off Time nB0 or BreaknB1=1.5V, Before-Make RL=50Ω, (6) Time CL=35pF 3.60 to 4.30 2.70 to 3.60 2.30 to 2.70 1.65 to 1.95 3.60 to 4.30 2.70 to 3.60 2.30 to 2.70 1.65 to 1.95 3.60 to 4.30 2.70 to 3.60 2.30 to 2.70 1.65 to 1.95 40 15 15 15 16 Min.
PAGE 6
VON I A(OFF) NC nBn A nA V IN V IN GND I ON Select V Sel = R ON = VON / ION Figure 3. Select VSel = GND 0 or Vcc **Each switch port is tested separately. On Resistance Figure 4. Off Leakage (Ports Tested Separately) nBn I A(ON) NC GND V IN Select Figure 5. nA V IN A VSel = GND 0 orVcc RS CL RL V OUT GND GND V Sel 0 or Vcc GND On Leakage Figure 6. tRISE = 2.5ns Test Circuit Load tFALL = 2.5ns VCC Input - VSel 10% GND VOH Output - VOUT VOL Figure 7.
PAGE 7
t RISE = 2.5ns nB n nA V cc V IN GN D VOUT CL V IN R L 10% 0V GN D GND 90% V cc /2 Input - VSel V OUT RS 0.9*V out 0.9*V out V Sel GN D tBBM RL and CL are functions of the application environment (50, 75, or 100 ). CL includes test fixture and stray capacitance. Figure 8. Break-Before-Make Interval Timing Network Analyzer RS GND V IN VS GND VSel GND VOU T GND RT RL and CL are functions of the application environment (50, 75, or 100 ).
PAGE 8
Network Analyzer RS VIN GND VS GND VSel GND GND RT V OUT RT GND GND RS and RT are functions of the application CROSSTALK = 20 Log (VOUT / VIN ) environment (50, 75, or 100 ). Figure 11. Adjacent Channel Crosstalk Generator VCC B RS VS VIN Input – VSEL mA CL GND nSn Off On Off 0V VOUT VOUT GND VOUT VSEL CL includes test fixture and stray capacitance GND Figure 12. Charge Injection Test Capacitance Meter nBn nSn Capacitance Meter VSel = f = 1MHz Figure 13.
PAGE 9
0.10 C 2.10 2X A 1.62 B KEEPOUT ZONE, NO TRACES OR VIAS ALLOWED (0.11) 1.12 1.60 PIN1 IDENT IS 2X LONGER THAN OTHER LINES 0.56 0.10 C 2X TOP VIEW (0.35) 10X (0.25) 10X 0.50 RECOMMENDED LAND PATTERN 0.55 MAX 0.05 C 0.05 C 0.05 0.00 C (0.20) 0.35 0.25 SIDE VIEW D 0.65 0.55 DETAIL A 0.35 0.25 1 4 0.35 0.25 DETAIL A 2X SCALE 0.56 5 10 (0.29) (0.15) (0.36) 6 9 0.50 0.25 9X 0.15 1.62 0.35 9X 0.25 0.10 0.05 C A B C ALL FEATURES BOTTOM VIEW NOTES: A.
PAGE 10
FSA2258 — Low-Voltage, Dual-SPDT (0.8) Analog Switch with 16kV ESD © 2008 Fairchild Semiconductor Corporation FSA2258 • Rev. 1.0.5 www.fairchildsemi.