Datasheet

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August 1997

Revised January 2005

FST3126 4-Bit Bus Switch

FST3126

4-Bit Bus Switch

General Description

The Fairchild Switch FST3126 provides four high-speed

CMOS TTL-compatible bus switches. The low on resis-

tance of the switch allows inputs to be connected to out-

puts without adding propagation delay or generating

additional ground bounce noise.

The device is organized as four 1-bit switches with sepa-

rate OE inputs. When OE is HIGH, the switch is ON and

Port A is connected to Port B. When OE is LOW, the switch

is OPEN and a high-impedance state exists between the

two ports.

Features

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Pin Descriptions

Connection Diagrams

Pin Assignment for SOIC and TSSOP

Pin Assignment for QSOP

Truth Table

Order Number Package Number Package Description

FST3126M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

FST3126QSC MQA16 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide

FST3126MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin Name Description

, OE

Bus Switch Enables

1A, 2A, 3A, 4A Bus A

1B, 2B, 3B, 4B Bus B

NC Not Connected

Inputs Inputs/Outputs

OE A,B

= B

Summary of content (5 pages)

PAGE 1
Revised January 2005 FST3126 4-Bit Bus Switch General Description Features The Fairchild Switch FST3126 provides four high-speed CMOS TTL-compatible bus switches. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. ■ 4Ω switch connection between two ports. The device is organized as four 1-bit switches with separate OE inputs. When OE is HIGH, the switch is ON and Port A is connected to Port B.
PAGE 2
FST3126 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions (Note 3) Supply Voltage (VCC ) −0.5V to +7.0V DC Switch Voltage (VS) −0.5V to +7.0V Power Supply Operating (VCC) DC Input Voltage (VIN) (Note 2) −0.5V to +7.0V Input Voltage (VIN) 0V to 5.5V 0V to 5.5V DC Input Diode Current (lIK) VIN<0V −50mA Output Voltage (VOUT) DC Output (IOUT ) Sink Current 128mA Input Rise and Fall Time (tr, tf) +/− 100mA DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) 4.
PAGE 3
TA = −40 °C to +85 °C, CL = 50pF, RU = RD = 500Ω Symbol Parameter VCC = 4.5 − 5.5V Min tPHL,tPLH Prop Delay Bus to Bus (Note 6) tPZH, tPZL Output Enable Time VCC = 4.0V Max 1.0 Min Units Conditions Max 0.25 0.25 ns VI = OPEN 4.5 5.0 ns VI = 7V for tPZL Figures 1, 2 VI = OPEN for tPZH tPHZ, tPLZ Output Disable Time 1.5 Figure No. 5.7 6.2 ns VI = 7V for tPLZ VI = OPEN for tPHZ Figures 1, 2 Figures 1, 2 Note 6: This parameter is guaranteed by design but is not tested.
PAGE 4
FST3126 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide Package Number MQA16 www.fairchildsemi.
PAGE 5
FST3126 4-Bit Bus Switch Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product.