Datasheet
©2001 Fairchild Semiconductor Corporation HUF75652G3 Rev. C0
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage BV
DSS
I
D
= 250µA, V
GS
= 0V (Figure 11) 100 - - V
Zero Gate Voltage Drain Current I
DSS
V
DS
= 95V, V
GS
= 0V - - 1 µA
V
DS
= 90V, V
GS
= 0V, T
C
= 150
o
C - - 250 µA
Gate to Source Leakage Current I
GSS
V
GS
= ±20V - - ±100 nA
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage V
GS(TH)
V
GS
= V
DS
, I
D
= 250µA (Figure 10) 2 - 4 V
Drain to Source On Resistance r
DS(ON)
I
D
= 75A, V
GS
= 10V (Figures 9) - 0.0067 0.008 Ω
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case R
θJC
TO-247 - - 0.29
o
C/W
Thermal Resistance Junction to
Ambient
R
θJA
--30
o
C/W
SWITCHING SPECIFICATIONS (V
GS
= 10V)
Turn-On Time t
ON
V
DD
= 50V, I
D
= 75A, V
GS
= 10V, R
GS
= 2.0Ω - - 320 ns
Turn-On Delay Time t
d(ON)
- 18.5 - ns
Rise Time t
r
- 195 - ns
Turn-Off Delay Time t
d(OFF)
-80-ns
Fall Time t
f
- 190 - ns
Turn-Off Time t
OFF
- - 410 ns
GATE CHARGE SPECIFICATIONS
Total Gate Charge Q
g(TOT)
V
GS
= 0V to 20V V
DD
= 50V,
I
D
= 75A,
I
g(REF)
= 1.0mA
(Figure 13)
- 393 475 nC
Gate Charge at 10V Q
g(10)
V
GS
= 0V to 10V - 211 255 nC
Threshold Gate Charge Q
g(TH)
V
GS
= 0V to 2V - 14 16.5 nC
Gate to Source Gate Charge Q
gs
-26-nC
Gate to Drain “Miller” Charge Q
gd
-74-nC
CAPACITANCE SPECIFICATIONS
Input Capacitance C
ISS
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
(Figure 12)
- 7585 - pF
Output Capacitance C
OSS
- 2345 - pF
Reverse Transfer Capacitance C
RSS
- 630 - pF
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
SD
I
SD
= 75A - - 1.25 V
I
SD
= 35A - - 1.00 V
Reverse Recovery Time t
rr
I
SD
= 75A, dI
SD
/dt = 100A/µs - - 150 ns
Reverse Recovered Charge Q
RR
I
SD
= 75A, dI
SD
/dt = 100A/µs - - 490 nC
HUF75652G3