Datasheet

LM555 — Single Timer
© 2002 Fairchild Semiconductor Corporation www.fairchildsemi.com
LM555 Rev. 1.1.0 6
An astable timer operation is achieved by adding resistor R
B
to Figure 2 and configuring as shown on Figure 6. In the
astable operation, the trigger terminal and the threshold terminal are connected so that a self-trigger is formed, operat-
ing as a multi-vibrator. When the timer output is high, its internal discharging transistor. turns off and the V
C1
increases
by exponential function with the time constant (R
A
+R
B
)*C.
When the V
C1
, or the threshold voltage, reaches 2 V
CC
/3; the comparator output on the trigger terminal becomes
high, resetting the F/F and causing the timer output to become low. This turns on the discharging transistor and the C1
discharges through the discharging channel formed by R
B
and the discharging transistor. When the V
C1
falls below
V
CC
/3, the comparator output on the trigger terminal becomes high and the timer output becomes high again. The dis-
charging transistor turns off and the V
C1
rises again.
In the above process, the section where the timer output is high is the time it takes for the V
C1
to rise from V
CC
/3 to 2
V
CC
/3, and the section where the timer output is low is the time it takes for the VC1 to drop from 2 V
CC
/3 to V
CC
/3.
When timer output is high, the equivalent circuit for charging capacitor C1 is as follows:
Since the duration of the timer output high state (t
L
) is the amount of time it takes for the V
C1
(t) to reach 2 V
CC
/3,
Figure 8. Waveforms of Astable Operation
Vcc
R
A
R
B
C1 Vc1
(0-)=Vcc/3
C
1
dv
c1
dt
-------------
V
cc
V0-()–
R
A
R
B
+
-------------------------------=1()
V
C1
0+()
V
CC
3⁄=2()
V
C1
t() V
CC
1
2
3
---e
-
t
R
A
R
B
+()C1
-------------------------------------
–


–






=3()
V
C1
t()
2
3
---V
CC
V=
CC
1
2
3
---e
-
t
H
R
A
R
B
+()C1
-------------------------------------
–



–







=4()
t
H
C
1
R
A
R
B
+()In2 0.693 R
A
R
B
+()C
1
==5()