Datasheet

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January 2014

NC7SZ125 • Rev. 1.0.5

NC7SZ125— TinyLogic

UHS Buffer with Three-State Output

NC7SZ125

TinyLogic

UHS Buffer with Three-State Output

Features

 Ultra-High Speed: t

2.6 ns (Typical) into 50 pF

at 5 V V

 High Output Drive: ±24 mA at 3 V V

 Broad V

Operating Range: 1.65 V to 5.5 V

 Matches Performance of LCX Operated at

3.3 V V

 Power Down High-Impedance Inputs/Outputs

 Over-Voltage Tolerance Inputs Facilitate 5 V to 3 V

Translation

 Proprietary Noise/EMI Reduction Circuitry

 Ultra-Small MicroPak™ Packages

 Space-Saving SOT23 and SC70 Packages

Description

The NC7SZ125 is a single buffer with three-state

output from Fairchild's Ultra-High Speed (UHS) of

TinyLogic

. The device is fabricated with advanced

CMOS technology to achieve ultra high speed with

high output drive while maintaining low static power

dissipation over a very broad V

operating range. The

device is specified to operate over the 1.65 V to 5.5 V

range. The inputs and output are high impedance

above ground when V

is 0 V. Inputs tolerate voltages

up to 6 V independent of V

operating voltage. The

output tolerates voltages above V

when in the 3-

STATE condition.

Ordering Information

Part Number

Top Mark

Package

Packing Method

NC7SZ125M5X

7Z25

5-Lead SOT23, JEDEC MO-178 1.6 mm

3000 Units on

Tape & Reel

NC7SZ125P5X

Z25

5-Lead SC70, EIAJ SC-88a, 1.25 mm Wide

3000 Units on

Tape & Reel

NC7SZ125L6X

6-Lead MicroPak™, 1.00 mm Wide

5000 Units on

Tape & Reel

NC7SZ125FHX

6-Lead, MicroPak2, 1x1 mm Body, .35mm Pitch

5000 Units on

Tape & Reel

Summary of content (10 pages)

PAGE 1
NC7SZ125 TinyLogic® UHS Buffer with Three-State Output Features Description  Ultra-High Speed: tPD 2.6 ns (Typical) into 50 pF at 5 V VCC    High Output Drive: ±24 mA at 3 V VCC   Power Down High-Impedance Inputs/Outputs The NC7SZ125 is a single buffer with three-state output from Fairchild's Ultra-High Speed (UHS) of TinyLogic®.
PAGE 2
IEEE/IEC Figure 1. Logic Symbol Pin Configurations Figure 2. SC70 and SOT23 (Top View) Figure 3.
PAGE 3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VCC Supply Voltage -0.5 6.0 V VIN DC Input Voltage -0.5 6.0 V 6.
PAGE 4
Symbol Parameter VCC TA=+25°C Conditions Min. Typ. TA=-40 to +85°C Max. Min. Max. VIH HIGH Level Input Voltage 1.65 to 1.95 0.75VCC 0.75VCC 2.30 to 5.50 0.70VCC 0.70VCC VIL LOW Level Input Voltage 1.65 to 1.95 0.25VCC 0.25VCC 2.30 to 5.50 0.30VCC 0.30VCC 1.65 1.80 2.30 VIN=VIH, IOH=-100 µA 3.00 VOH 4.50 HIGH Level Output Voltage 1.55 1.70 1.80 1.70 2.20 2.30 2.20 2.90 3.00 2.90 4.40 4.50 4.40 IOH=-4 mA 1.29 1.52 1.29 2.30 IOH=-8 mA 1.90 2.15 1.90 3.
PAGE 5
Symbol tPLH,tPHL Parameter Propagation Delay VCC 1.65 1.80 2.50 ±0.20 3.30 ±0.30 5.00 ±0.50 3.30 ±0.30 5.00 ±0.50 tPZL,tPZH Output Enable Time tPLZ,tPHZ Output Disable Time CIN COUT Input Capacitance Output Capacitance CPD Power Dissipation (2) Capacitance 1.65 1.80 2.50 ±0.20 3.30 ±0.30 5.00 ±0.50 1.65 1.80 2.50 ±0.20 3.30 ±0.30 5.00 ±0.50 0.00 0.00 3.30 TA=+25°C Min. Typ. Max.
PAGE 6
NC7SZ125 — TinyLogic® UHS Buffer with Three-State Output Physical Dimensions 3.00 2.80 5 SYMM CL 0.95 0.95 A 4 B 3.00 2.60 1.70 1.50 1 2 2.60 3 (0.30) 1.00 0.50 0.30 0.95 0.20 1.90 C A B 0.70 TOP VIEW LAND PATTERN RECOMMENDATION SEE DETAIL A 1.30 0.90 1.45 MAX 0.15 0.05 0.22 0.08 C 0.10 C NOTES: UNLESS OTHEWISE SPECIFIED GAGE PLANE A) THIS PACKAGE CONFORMS TO JEDEC MO-178, ISSUE B, VARIATION AA, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) MA05Brev5 0.25 8° 0° 0.55 0.35 0.
PAGE 7
NC7SZ125 — TinyLogic® UHS Buffer with Three-State Output Physical Dimensions Figure 8. 5-Lead, SC70, EIAJ SC-88a, 1.25 mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 8
NC7SZ125 — TinyLogic® UHS Buffer with Three-State Output Physical Dimensions 2X 0.05 C 1.45 B 2X (1) 0.05 C (0.254) (0.49) 5X 1.00 (0.75) PIN 1 IDENTIFIER 5 (0.52) 1X A TOP VIEW 0.55MAX (0.30) 6X PIN 1 0.05 C 0.05 0.00 RECOMMENED LAND PATTERN 0.05 C C 1.0 DETAIL A 0.10 0.05 0.45 0.35 0.10 0.00 6X 0.25 0.15 6X C B A C 0.40 0.30 0.35 5X 0.25 0.40 5X 0.30 0.5 (0.05) 6X BOTTOM VIEW DETAIL A PIN 1 TERMINAL 0.075 X 45 CHAMFER (0.13) 4X Notes: 1.
PAGE 9
NC7SZ125 — TinyLogic® UHS Buffer with Three-State Output Physical Dimensions 0.89 0.35 0.05 C 1.00±0.050 2X B A 5X 0.40 PIN 1 MIN 250uM 0.66 1.00±0.050 1X 0.45 6X 0.19 0.05 C TOP VIEW RECOMMENDED LAND PATTERN FOR SPACE CONSTRAINED PCB 2X 0.90 0.05 C 0.35 0.50±0.05 C 5X 0.52 SIDE VIEW 0.73 1X 0.57 6X (0.08) 4X 1 DETAIL A 2 3 0.14±0.05 0.20 6X ALTERNATIVE LAND PATTERN FOR UNIVERSAL APPLICATION (0.05) 6X 5X 0.30±0.05 6 5 4 0.60 0.35 (0.08) 4X 0.10 .05 C C B A 0.35±0.
PAGE 10
NC7SZ125 — TinyLogic® UHS Buffer with Three-State Output © 1996 Fairchild Semiconductor Corporation NC7SZ125 • Rev. 1.0.5 www.fairchildsemi.