Datasheet

November 2013
SSN1N45B
N-Channel B-FET
450 V, 0.5 A, 4.25 Ω
Description
SSN1N45B — N-Channel B-FET
©2002 Fairchild Semiconductor Corporation
SSN1N45B Rev. C0
www.fairchildsemi.com
1
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar, DMOS technology. This advanced technology has
been especially tailored to minimize on-state resistance,
provide superior switching performance, and withstand
high energy pulse in the avalanche and commutation
mode. These devices are well suited for electronic ballasts
based on half bridge configuration.
Features
Absolute Maximum Ratings T
C
= 25
o
C unless otherwise noted.
TO-92
G
D
S
G
S
D
•
0.5 A, 450 V, R
DS(on)
= 4.25 Ω @ V
GS
= 10 V
•
Low Gate Charge (typical 6.5 nC)
•
Low Crss (typical 6.5 pF)
•
100% Avalanche Tested
•
Improved dv/dt Capability
•
Gate-Source Voltage ± 50V Guaranteed
Thermal Characteristics
Symbol Parameter SSN1N45BTA Unit
V
DSS
Drain-Source Voltage 450 V
I
D
Drain Current
- Continuous (T
C
= 25°C)
0.5 A
- Continuous (T
C
= 100°C)
0.32 A
I
DM
Drain Current - Pulsed
(Note 1)
4.0 A
V
GSS
Gate-Source Voltage ± 50 V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
108 mJ
I
AR
Avalanche Current
(Note 1)
0.5 A
E
AR
Repetitive Avalanche Energy
(Note 1)
0.25 mJ
dv/dt Peak Diode Recovery dv/dt
(Note 3)
5.5 V/ns
P
D
Power Dissipation (T
A
= 25°C)
0.9 W
Power Dissipation (T
L
= 25°C)
2.5 W
- Derate above 25°C 0.02 W/°C
T
J
, T
stg
Operating and Storage Temperature Range -55 to +150 °C
T
L
Maximum Lead Temperature for Soldering,
1/8" from Case for 5 Seconds
300 °C
Symbol Parameter
SSN1N45BTA Unit
R
θJL
Thermal Resistance, Junction-to-Lead, Max
.
(Note 5a)
50 °C/W
R
θJA
Thermal Resistance, Junction-to-Ambient, Max.
(Note 5b)
140 °C/W