Datasheet

ManualsBrandsFairchild ManualsDiscrete SemiconductorsMOSFET N, 50 V 14 A 48 W IPAK

RFD14N05L, RFD14N05LSM, RFP14N05L

14A, 50V, 0.100 Ohm, Logic Level,

N-Channel Power MOSFETs

These are N-channel power MOSFETs manufactured using

the MegaFET process. This process, which uses feature

sizes approaching those of LSI integrated circuits, gives

optimum utilization of silicon, resulting in outstanding

performance. They were designed for use in applications

such as switching regulators, switching converters, motor

drivers and relay drivers. This performance is accomplished

through a special gate oxide design which provides full rated

conductance at gate bias in the 3V-5V range, thereby

facilitating true on-off power control directly from logic level

(5V) integrated circuits.

Formerly developmental type TA09870.

Features

• 14A, 50V

•r

DS(ON)

= 0.100Ω

• Temperature Compensating PSPICE

Model

• Can be Driven Directly from CMOS, NMOS, and

TTL Circuits

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

•175

C Operating Temperature

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Packaging

JEDEC TO-251AA JEDEC TO-252AA

JEDEC TO-220AB

Ordering Information

PART NUMBER PACKAGE BRAND

RFD14N05L TO-251AA 14N05L

RFD14N05LSM TO-252AA 14N05L

RFP14N05L TO-220AB F14N05L

NOTE: When ordering, use the entire part number. Add the suffix 9A to

obtain the TO-252AA variant in the tape and reel, i.e., RFD14N05LSM9A.

SOURCE

DRAIN (FLANGE)

GATE

DRAIN

GATE

SOURCE

DRAIN (FLANGE)

GATE

DRAIN (FLANGE)

SOURCE

DRAIN

Data Sheet November 2004

Summary of content (8 pages)

PAGE 1
RFD14N05L, RFD14N05LSM, RFP14N05L Data Sheet November 2004 14A, 50V, 0.100 Ohm, Logic Level, N-Channel Power MOSFETs Features • 14A, 50V These are N-channel power MOSFETs manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI integrated circuits, gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers and relay drivers.
PAGE 2
RFD14N05L, RFD14N05LSM, RFP14N05L Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFD14N05L, RFD14N05LSM, RFP14N05L 50 50 ±10 14 Refer to Peak Current Curve Refer to UIS Curve 48 0.32 -55 to 175 Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 3
RFD14N05L, RFD14N05LSM, RFP14N05L Typical Performance Curves Unless Otherwise Specified 16 1.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 12 8 4 0.2 0 0 125 50 75 100 TC , CASE TEMPERATURE (oC) 25 150 0 175 25 FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE 50 75 100 125 TC, CASE TEMPERATURE (oC) 150 175 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs TEMPERATURE 2 Zθ JC, NORMALIZED THERMAL IMPEDANCE 1 0.5 0.2 0.1 PDM 0.1 0.05 t1 t2 0.02 0.
PAGE 4
RFD14N05L, RFD14N05LSM, RFP14N05L Typical Performance Curves Unless Otherwise Specified (Continued) 35 VGS = 10V VGS = 5V 30 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) 50 STARTING TJ = 25oC 10 STARTING TJ = 150oC If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) 0.01 VGS = 4V 25 PULSE DURATION = 80µs, TC = 25oC DUTY CYCLE = 0.5% MAX. 20 15 VGS = 3V 10 5 If R ≠ 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS-VDD) +1] 1 VGS = 4.5V 0.1 1 tAV, TIME IN AVALANCHE (ms) 0 10 VGS = 2.5V 1.5 6.0 3.
PAGE 5
RFD14N05L, RFD14N05LSM, RFP14N05L Typical Performance Curves 2.0 VGS = VDS, ID = 250µA ID = 250µA NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.5 1.0 0.5 0 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC) CISS C, CAPACITANCE (pF) 0.5 0 -80 600 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD COSS 200 CRSS 200 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) 50 40 5 VDD = BVDSS VDD = BVDSS 4 30 3 20 2 0.75 BVDSS 0.50 BVDSS 0.25 BVDSS RL = 3.57Ω IG(REF) = 0.
PAGE 6
RFD14N05L, RFD14N05LSM, RFP14N05L Test Circuits and Waveforms (Continued) tON tOFF td(ON) VDS td(OFF) tr VDS tf 90% 90% RL VGS + - DUT 10% 0 VDD 10% 90% RGS VGS VGS 0 50% 10% FIGURE 18. SWITCHING TIME TEST CIRCUIT 50% PULSE WIDTH FIGURE 19. RESISTIVE SWITCHING WAVEFORMS VDS VDD RL Qg(TOT) VDS VGS = 10V VGS Qg(5) + VDD DUT IG(REF) VGS = 5V VGS - VGS = 1V 0 Qg(TH) IG(REF) 0 FIGURE 20. GATE CHARGE TEST CIRCUIT ©2004 Fairchild Semiconductor Corporation FIGURE 21.
PAGE 7
RFD14N05L, RFD14N05LSM, RFP14N05L PSPICE Electrical Model .SUBCKT RFP14N05L 2 1 3 ; rev 9/15/94 CA 12 8 1.464e-9 CB 15 14 1.64e-9 CIN 6 8 6.17e-10 DPLCAP RSCL1 RSCL2 ESG + GATE 1 9 6 8 ESCL LGATE RGATE 11 RDRAIN 16 VTO + 21 EVTO 20 + 18 + DBODY EBREAK 17 18 MOS2 6 MOS1 8 RIN CIN 8 RSOURCE 7 LSOURCE 3 SOURCE S2A S1A 12 S1A S1B S2A S2B DBREAK 50 MOS1 16 6 8 8 MOSMOD M = 0.99 MOS2 16 21 8 8 MOSMOD M = 0.01 RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 33.1e-3 RGATE 9 20 5.
PAGE 8
TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST ActiveArray™ FASTr™ Bottomless™ FPS™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ DOME™ GTO™ EcoSPARK™ HiSeC™ E2CMOS™ I2C™ EnSigna™ i-Lo™ FACT™ ImpliedDisconnect™ FACT Quiet Series™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC Across the board.