FSC-BT1006A Datasheet FSC-BT1006 Bluetooth Module Datasheet Version 1.4 Shenzhen Feasycom Technology Co.,Ltd -1- www.feasycom.
FSC-BT1006A Datasheet Copyright © 2013-2019 Feasycom Technology. All Rights Reserved. Feasycom Technology reserves the right to make corrections, modifications, and other changes to its products, documentation and services at anytime. Customers should obtain the newest relevant information before placing orders. To minimize customer product risks, customers should provide adequate design and operating safeguards.
FSC-BT1006A Datasheet Contents 1. INTRODUCTION ............................................................................................................................................................... 5 2. GENERAL SPECIFICATION ................................................................................................................................................. 8 3. HARDWARE SPECIFICATION ..................................................................................................
FSC-BT1006A Datasheet 5.4.1 Digital to Analogue Converter .................................................................................................................................. 34 5.5AUXILIARY ADC ....................................................................................................................................................................... 35 5.6MICROPHONE BIAS GENERATOR ....................................................................................................
FSC-BT1006A Datasheet 1. INTRODUCTION Overview Audio interfaces: dual I²S and PCM,SPDIF, analog and digital microphone FSC-BT1006Aused chip is QCC3007(Bluetooth chip),it is a Bluetooth 5.0 dual-mode module. It provides a Bluetooth Low Energy fully compliant system for audio and data communication with Feasycom stack.
FSC-BT1006A Datasheet Module picture as below showing detection SPI interface for debug and programming I²C master support Up to 14 general-purpose PIOs 3 LED drivers with PWM flasher independent of MCU Battery charger Lithium ion / Lithium polymer battery charger Charger supports 4.20 V and 4.
FSC-BT1006A Datasheet Audio features SBC and AAC audio codecs Qualcomm TrueWireless Stereo (TWS), which allows twodevices to be configured as a stereo pair Configurable Signal Detection to trigger events 1 bank of up to 10-stage Speaker Parametric EQ 6 banks of up to 5-stage User Parametric EQ for musicenhancement Qualcomm Expansion audio processing: 3Dstereo widening Compander to compress or expand the dynamic range ofthe audio Post Mastering to improve DAC fidelity Dual I²S outputs with crossover Additi
FSC-BT1006A Datasheet 2. General Specification Table 1:General Specifications Categories Wireless Specification Features Implementation On-board chip QCC3007 Bluetooth Version V5.0 Dual-mode Bluetooth low energy radio Frequency 2.402 - 2.480 GHz Transmit Power +8 dBm (Maximum) Receive Sensitivity -92.0 dBm (typ) π/4 DQPSK receiver sensitivity and -82.
FSC-BT1006A Datasheet MIC THD+N: 0.004% Headphone SNR: 96dB Headphone THD+N: 0.
FSC-BT1006A Datasheet HARDWARE SPECIFICATION GND AIO0 NC I2S2_SCK/PIO9 I2S2_SD_IN/PIO8 I2S2_SD_OUT/PIO6/I2C_SCL I2S2_WS/PIO7/I2C_SDA RESET SPI_CSB/PIO4/I2S1_WS SPI_MOSI/PIO2/I2S1_SD_IN/SPDIF_IN SPI_MISO/PIO3/I2S1_SD_OUT SPI_CLK/PIO5/I2S1_SCK BT_TX/PIO1 BT_RX/PIO0 BT_CTS/PIO17 BT_RTS/PIO16 LED0 LED1 LED2 NC NC GND EXT_ANT GND SPK_LP SPK_LN SPK_RP SPK_RN MIC_L_BIAS MIC_LN/LINE_LN MIC_LP/LINE_LP MIC_L_BIAS NC NC PIO18 PIO21 NC NC VDD_USB/3.
FSC-BT1006A Datasheet 5 I2S2_SD_IN/PIO8 I/O Programmable input/output line 8 Alternative Function:I2S2 synchronous data input Note 5,6,10 6 I2S2_SD_OUT/PIO6/I2C_SCL I/O Programmable input/output line 6 Alternative Function1: I2S2 synchronous data output Alternative Function2: I2C_SCL Note5,6 ,10 7 I2S2_WS/PIO7/I2C_SDA I/O Programmable input/output line 7 Alternative Function1: I2S2 word select.
FSC-BT1006A Datasheet 30 NC 31 VDD_USB/3.3V_OUT Vdd Positive supply for USB ports/ 3.3V bypass linear regulator output 32 GND Vss Power Ground 33 VBAT_IN Vdd Power supply voltage 2.8V~ 4.3V(Battery positive terminal) 34 VREGENABLE 35 1.8V_OUT 36 I Note 7 Power enable * The PIN on electricity than VBAT_IN and VDD_IO foot 100 ms delay. Note 3 Vdd 1.8V switch-mode power regulator output Note 1 VDD_IO Vdd Power supply voltage 1.7V ~ 3.
FSC-BT1006A Datasheet Note 8 Note 9 Note 10 2, when the No. 39 PIN (VCC_CHG) with a 5V input pin, this pin outputs 3.2V ~ 3.4V (maximum current: 250mA) Analog input voltage range: 0~ 1.3V By default, this PIN is an empty feet. This PIN can connect to an external antenna to improve the Bluetooth signal coverage. If you need to use an external antenna, by modifying the module on the 0R resistance to block out the on-board antenna; Or contact Feasycom for modification. Note: IO ports are 1.7~3.
FSC-BT1006A Datasheet The picture belowshows the mode-to-mode transition voltages. These voltages are fixed and calibrated. The transition between modes can occur at any time. Figure 4:Battery Charger Mode-to-Mode Transition Diagram Disabled Mode In the disabled mode the battery charger is fully disabled and draws no active current on any of its terminals.
FSC-BT1006A Datasheet When the battery is fully charged, the charger enters standby mode, and battery charging stops. The battery voltageon the VBAT_SENSE pin is monitored, and when it drops below a threshold set at Vhyst below the final chargingvoltage, Vfloat, the charger re-enters fast charge mode. Error Mode The charger enters the error mode if the voltage on the VCC_CHG pin is too low to operate the charger correctly(VBAT_SENSE is greater than VCC_CHG - 50mV (typical)).
FSC-BT1006A Datasheet PSKEY_HOSTIO_UART_RESET_TIMEOUT is set to a value more than 1000 A reboot function is also available under software control. 4.2.1Digital Pin States on Reset This table shows the pin states of FSC-BT1006A on reset. PU and PD default to weak values unless specifiedotherwise. Table 4: Pin States on Reset 4.
FSC-BT1006A Datasheet 4.6 Serial Interfaces 4.6.1 UART Interface FSC-BT1006Aprovides one channels of Universal Asynchronous Receiver/Transmitters(UART)(Full-duplex asynchronous communications). The UART Controller performs a serial-to-parallel conversion on data received from the peripheral and a parallel-to-serial conversion on data transmitted from the CPU. Each UART Controller channel supports ten types of interrupts. This is a standard UART interface for communicating with other serial devices.
FSC-BT1006A Datasheet Module TX RX RX TX CTS RTS RTS CTS GND GND Host Figure 5: UART Connection The UART interface resets FSC-BT1006A on reception of a break signal. A break is identified by a continuous logic low (0V) on the UART_RX terminal, as belowpicture shows. If t BRK is longer than the value defined by the PSKEY_HOSTIO_ UART _RESET_TIMEOUT, a reset occurs. This feature enables a host to initialise the system toa known state. Also, FSC-BT1006A can issue a break character for waking the host.
FSC-BT1006A Datasheet Figure 7: I2C Bus Timing The device on-chip I2C logic provides the serial interface that meets the I2C bus standard modespecification. The I2C port handles byte transfers autonomously. The I2C H/W interfaces to the I2C bus via two pins: SDA and SCL. Pull up resistor is needed for I2C operation as these are open drain pins. When the I/O pins are used as I2C port, user must set the pins function to I2C in advance. 4.6.
FSC-BT1006A Datasheet Figure 8: LED Equivalent Circuit If a known value of current is required throughthe LED to give a specific luminous intensity, then the value of RLED is calculated. ILED= VDD-VF RLED+RON For the LED pads to act as resistance, the external series resistor, RLED , needs to be such that the voltage dropacross it, V R , keeps V PAD below 0.5V. VDD=VF+VR+VPAD Note: The LED current adds to the overall current. Conservative LED selection extends battery life. 4.
FSC-BT1006A Datasheet Figure 9: Audio Interface 4.8.1 Audio Input and Output The audio input circuitry consists of 2 independent 16-bit high-quality ADC channels: Programmable as either stereo or dual-monoinputs. 1 input programmable as either microphone or line input,the other as line input only. Each channel can be connected as either single-ended or fully differential. Each channel has an analog and digital programmable gain stage.
FSC-BT1006A Datasheet Figure 10: Audio Codec Input and Output Stages FSC-BT1006A audio codec uses a fully differential architecture in the analog signal path, This architecture results in low common-mode-noise sensitivity and good power supply rejection while effectively doubling the signal amplitude. It operatesfrom a dual power supply, VDD_AUDIO(internal) for the audio circuits and VDD_AUDIO_DRV (internal)for the audio driver circuits.
FSC-BT1006A Datasheet A digital gain stage Figure 11: Audio Input Gain ADC Pre-amplifier and analog/digital Gain The gain of the ADC inputs can be configured in the range of -27 dB to 63.5 dB steps, making it suitable for line andmicrophone input levels. 0 dB is 1600 mV pk-pk input. The ADC input impedance is nominal 6 kΩ except when 0 dB pre-amplifier gain is selected when it becomes 12 kΩ.
FSC-BT1006A Datasheet The ADC contains 2 integrated anti-aliasing filters: A long IIR filter suitable for music (>44.1kHz) G.722 filter is a digital IIR filter that improves the stop-band attenuation required for G.722 compliance(which is the best selection for 8kHz / 16kHz / voice) For more information contact Feasycom. DAC The DAC consists of: Each DAC has a fourth-order Sigma-Delta converter. Each DAC is a separate channel with identical functionality.
FSC-BT1006A Datasheet 5 15.5 13 -8.5 6 18 14 -6 7 21.5 15 -2.5 Table 8: DAC Analogue Gain Rate Selection Analogue Gain Selection Value DAC Analogue Gain Setting(dB) Analogue Gain Selection Value DAC Analogue Gain Setting(dB) 7 0 3 -12 6 -3 2 -15 5 -6 1 -18 4 -9 0 -21 DAC Digital FIR Filter The DAC contains an integrated digital FIR filter with the following modes: A default long FIR filter for best performance at >= 44.1kHz. A short FIR to reduce latency.
FSC-BT1006A Datasheet typically100/150 nF to give a bass roll-off to limit wind noise on the microphone. The mic bias generator has a maximum drop out of 300 mV, if VBAT drops below (selected output voltage – drop outvoltage), the output voltage will fall below specification. The generator will continue to operate but noise performancewill be impaired. 4.8.4Line input The picture belowshow 2 circuits for line input operation and show connections for either differential or single-ended inputs.
FSC-BT1006A Datasheet The picture below shows that the output is available as a differential signal between SPKR_LN and SPKR_LPfor the left channel, and between SPKR_RN and SPKR_RP for the right channel. Figure 15: Speaker Output 4.8.6I2S1 and I2S2 interface FSC-BT1006Asupports I2S input and output via its two industry-standard I2S digital audio interfaces, left-justified orright-justified. FSC-BT1006Asupports several alternative PCM data formats. For further details, contact QTIL.
FSC-BT1006A Datasheet Figure 16:Digital audio interface modes Table 10: Digital audio interface slave timing Parameter Min Type Max Unit SCK Frequency - - 6.2 MHz WS Frequency - - 96 KHz tch - SCK high time 80 - - ns tcl - SCK low time 80 - - ns Min Type Max Unit tssu - WS valid to SCK high set-up time 20 - - ns tsh - SCK high to WS invalid hold time 2.
FSC-BT1006A Datasheet Figure 17:Digital audio interface slave timing Table 12: Digital audio interface master timing Parameter Min Type Max Unit SCK Frequency - - 6.2 MHz WS Frequency - - 96 KHz Min Type Max Unit tspd - SCK low to WS valid delay time - - 39.27 ns topd - SCK low to WS valid delay time - - 18.44 ns tisu - SD_IN valid to SCK high set-uptime 18.
FSC-BT1006A Datasheet Figure 18:Digital audio interface master timing 4.9Programming and Debug Interface Important Note: FSC-BT1006A provides a debug SPI interface for programming, configuring, and debugging the FSC-BT1006A. Access to this interface is required in production. Ensure the 4 SPI signals and the SPI/I2S_SEL line are brought out toeither test points or a header. The SPI/I2S_SEL line needs to be pulled high externally to use the SPI interface.
FSC-BT1006A Datasheet 5V(VCC_CHG) -0.4 +5.75 / 6.50 (a) V BATTERY(LED 0,1,2) -0.4 +4.4 V BATTERY(VBAT_IN) -0.4 +4.4 V BATTERY(VREGENABLE) -0.4 +4.4 V VDD_USB/3.3V_OUT -0.4 +3.6 V VDD_IO -0.4 +3.6 Other terminal voltages TST - VSS-0.4 Storage Temperature VDD+0.4≤3.60 +105 -40 V (b) V °C (a) Standard maximum input voltage is 5.75V, a 6.50V maximum depends on firmware version and implementation of over-temperatureprotection software, for more information contact Feasycom.
FSC-BT1006A Datasheet Output Voltage VOL - Low Level Output Voltage, IOL=4mA - - 0.4 V VOH - High Level Output Voltage, IOH=-4mA 0.7XVDD_IO - - V - - 5 nS -150 -40 -10 uA Strong pull-down 10 40 150 uA Weak pull-up -5 -1.0 -0.33 uA Weak pull-down 0.33 1.0 5.0 uA C I Input Capacitance 1.0 - 5.0 pF Min Type Max Unit 4.75 / 3.10(a) 5.00 5.75 /6.50(b) V Tr/Tf Input and Tristate Currents Strong pull-up 5.3.
FSC-BT1006A Datasheet (a) Headroom = VCC_CHG – VBAT_IN 5.3.3USB Table 18:USB Parameter 3V3_USB for correct USB operation(internal) Min Type Max Unit 3.10 3.30 3.60 V Input Threshold VIL - input logic level low - - 0.3X3V3_USB V VIH - input logic level high 0.7X3V3_USB - - V Output Voltage Levels to Correctly Termlnated USB Cable VOL - output logic level low 0 - 0.2 V VOH - output logic level high 2.8 - 3V3_USB V 5.3.
FSC-BT1006A Datasheet B/W = 20Hz->F sample /2 (20kHz max) A-Weighted THD+N < 0.1% 1.6V pk-pk input THD+N f in = 1kHz B/W = 20Hz->F sample /2 (20kHz max) 1.6V pk-pk input 8kHz - 94.4 - dB 16kHz - 92.4 - dB 32kHz - 92.5 - dB 44.1kHz - 93.2 - dB 48kHz - 91.9 - dB 8kHz - 0.004 - % 48kHz - 0.016 - % F sample Digital gain Digital gain resolution = 1/32 -24 - 21.
FSC-BT1006A Datasheet 5.5Auxiliary ADC Table 22:Auxiliary ADC Parameter Min Type Max Unit Resolution - - 10 Bits Input voltage range (a) 0 - 1.95 V -1 - 1 LSB 0 - 1 LSB -1 - 1 LSB -0.8 - 0.8 % Input bandwidth - 100 - KHz Conversion time 1.38 1.69 2.75 uS Min Type Max Unit Output voltage (1.8 V selected) 1.62 1.8 1.98 V Output voltage (2.6 V selected) 2.34 2.6 2.86 V Drop out from VBAT input - - 300 mV Output current available - - 2.
FSC-BT1006A Datasheet N/A Deep sleep With UART host connection - 63 N/A Page scan Page = 1280 ms interval Window = 11.25 ms - 243 N/A Inquiry and page scan Inquiry = 1280 ms interval Page = 1280 ms interval Window = 11.25 ms - 441 Master ACL No traffic DH1 4.89 mA Master ACL File transfer DH1 7.
FSC-BT1006A Datasheet Audio gateway transmits silence when SCO or eSCO channel is open LEDs disconnected AFH classification master disabled These values exclude SPI flash device current. 6. MSL &ESDProtection Table 25:MSL and ESD Parameter Class Max Rating MSL grade(with JEDEC J-STD-020) MSL 3 Human Body Model Contact Discharge per ANSI/ESDA/JEDEC JS-001 2 2kV(all pins) Charged Device Model Contact Discharge per JEDEC/EIA JESD22-C101 III 500V (all pins) 6.
FSC-BT1006A Datasheet IPC/JEDEC J-STD-033. Note: The shipping tray cannot be heated above 65°C. If baking is required at the higher temperatures displayed in the below Table 27, the modules must be removed from the shipping tray. Any modules not manufactured before exceeding their floor life should be re-packaged with fresh desiccate and a new humidity indicator card. Floor life for MSL (Moisture Sensitivity Level) 3 devices is 168 hours in ambient environment 30°C/60%RH.
FSC-BT1006A Datasheet solder. The peak temperature should be high enough to achieve good wetting but not so high as to cause component discoloration or damage. Excessive soldering time can lead to intermetallic growth which can result in a brittle joint. The recommended peak temperature (Tp) is 230 ~ 250 C. The soldering time should be 30 to 90 second when the temperature is above 217 C.
FSC-BT1006A Datasheet 9. 9.1 HARDWARE INTEGRATION SUGGESTIONS Soldering Recommendations FSC-BT1006A is compatible with industrial standard reflow profile for Pb-free solders. The reflow profile used is dependent on the thermal mass of the entire populated PCB, heat transfer efficiency of the oven and particular type of solder paste used. Consult the datasheet of particular solder paste for profile configurations.
FSC-BT1006A Datasheet 9.3 Layout Guidelines(External Antenna) Placement and PCB layout are critical to optimize the performances of a module without on-board antenna designs. The trace from the antenna port of the module to an external antenna should be 50 and must be as short as possible to avoid any interference into the transceiver of the module. The location of the external antenna and RF-IN port of the module should be kept away from any noise sources and digital traces.
FSC-BT1006A Datasheet To reduce signal reflections, sharp angles in the routing of the micro strip line should be avoided. Chamfers or fillets are preferred for rectangular routing; 45-degree routing is preferred over Manhattan style 90-degree routing. Antenna Wrong Antenna Antenna PCB PCB PCB Better Best Figure 24: Recommended Trace Connects Antenna and the Module Routing of the RF-connection underneath the module should be avoided.
FSC-BT1006A Datasheet Figure 25: Tray vacuum 10.2 Packing box(Optional) * If require any other packing, must be confirmed with customer * Package: 2000PCS Per Carton (Min Carton Package) Figure 26: Packing Box Shenzhen Feasycom Technology Co.,Ltdwww.feasycom.
FSC-BT1006A Datasheet 11. APPLICATION SCHEMATIC 11.1Application circuit diagram(Default) Shenzhen Feasycom Technology Co.,Ltdwww.feasycom.
FSC-BT1006A Datasheet 11.2Application circuit diagram(Earphone) FCC/IC Statements (OEM) Integrator has to assure compliance of the entire end-product incl. the integrated RF Module. For 15 B (§15.107 and if applicable §15.109) compliance, the host manufacturer is required to show compliance with 15 while the module is installed and operating.
FSC-BT1006A Datasheet This device contains licence-exempt transmitter(s)/receiver(s) that comply with Innovation, Science and Economic Development Canada’s licence-exempt RSS(s). Operation is subject to the following two conditions: (1) This device may not cause interference. (2) This device must accept any interference, including interference that may cause undesired operation of the device.
FSC-BT1006A Datasheet NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
