FSC-BT825 FSC-BT825 4.2 Dual Mode Bluetooth Module Data Sheet en zh en Sh Document Version: om yc as Fe Document Type: V1.1 Jun 21. 2019 gy o ol hn ec Release Date: FSC-BT825 d ,Lt o. Contact Us Shenzhen Feasycom Technology Co.,LTD Email: sales@feasycom.com Address: Room 2004-2005,20th Floor,Huichao Technology Building,Jinhai Road,Xixiang ,Bao an District,Shenzhen,518100,China. Tel: 86-755-27924639, 86-755-23062695 深圳市飞易通科技有限公司 www.feasycom.
FSC-BT825 Release Record Version Number Revision 1.0 Revision 1.1 Release Date 2016-06-24 2019-06-21 Comments First Release 1,Upgrade Bluetooth version to BT4.2 2,Modify the description of the error en zh en Sh om yc as Fe gy o ol hn ec d ,Lt o. 深圳市飞易通科技有限公司 www.feasycom.
FSC-BT825 1. INTRODUCTION FSC-BT825 is a fully integrated Bluetooth module that complies with Bluetooth 4.2 dual mode protocols (BR/EDR and LE). It supports SPP, HID, GATT, ATT, and other profiles. It integrates Baseband controller and RF antenna in a small package, so the designers can have better flexibilities for the product shapes. FSC-BT825 can be communicated by UART port. With Feasycom’s Bluetooth stack, Customers can easily transplant to their software. Please refer to Feasycom stack design guide.
FSC-BT825 1.2 Feature ◆ Fully qualified Bluetooth 4.2/4.0/3.0/2.1/2.0/1.2/1.1 ◆ Postage stamp sized form factor ◆ Low power ◆ Class 1.5 support(high output power) ◆ The default UART Baud rate is 115.2Kbps and can support from 1200bps up to 921.6Kbps ◆ UART, PCM hardware interfaces ◆ Bluetooth stack profiles support: SPP, HID, GATT, ATT, GAP ◆ Support Apple MFi (iAP2), iBeacon en Sh 1.
FSC-BT825 2. GENERAL SPECIFICATION General Specification Chip Set RTL8761 Product ID FSC-BT825 Dimension 10.8mm(W) x 13.5mm(L) x 1.8mm(H) Bluetooth Specification Bluetooth V4.2 (Dual Mode) Power Supply 3.3 Volt DC Output Power 5.5 dBm (Class 1.5) Sensitivity -82dBm@0.1%BER en Sh Frequency Band 2.402GHz -2.480GHz ISM band Modulation GFSK, π/4-DQPSK, 8-DPSK zh Baseband Crystal OSC 40MHz en 1600hops/sec, 1MHz channel space,79 Fe Hopping & channels Channels(BT 4.
FSC-BT825 3. PHYSICAL CHARACTERISTIC en zh en Sh Figure 2： FSC-BT825 PIN Diagram om yc as Fe gy o ol hn ec d ,Lt o. Figure 3： Pin Configuration and Package Dimensions（TOP VIEW） 深圳市飞易通科技有限公司 www.feasycom.
FSC-BT825 4. PIN DEFINITION DESCRIPTIONS Pin Pin Name Pad Type Description 1 GND VSS 2 PCM-CLK Bi-directional Synchronous data clock(operating votage level: 3.3V) 3 PCM_OUT CMOS output Synchronous data output(operating votage level: 3.3V) 4 PCM_IN CMOS input Synchronous data input(operating votage level: 3.3V) 5 PCM-SYNC Bi-directional Synchronous data sync(operating votage level: 3.3V) Power Ground 32.
FSC-BT825 The interface consists of four-line connection as described in below: Signal name Driving source Description UART-TX FSC-BT825 module Data from FSC-BT825 module UART-RX Host Data from Host UART-RTS FSC-BT825 module Request to send output of FSC-BT825 module UART-CTS Host Clear to send input of FSC-BT825 module Table 3 en Sh Default Data Format Property zh Flow Control 115.
FSC-BT825 en Sh Figure 4: UART Interface Waveform PIN diagram en zh Fe as 5.1.1 UART Interface Power-On Sequence om yc The UART interface power-on sequence differs depe nding on whether or not host flow control is supported. Te no ch UART Hardware Flow Control Not Supported gy lo td ,L o. Figure 5: UART Power-On Sequence without Hardware Flow Control C 深圳市飞易通科技有限公司 www.feasycom.
FSC-BT825 UART Hardware Flow Control Supported Figure 6: UART Power On Sequence with Hardware Flow Control en Sh Description T33ramp 3.3V Power Pre-Charge Ramp Up Duration Before Formal Power Up. We recommend that a 3.3V power-on and then power-off sequence is executed by the host controller before the formal power on sequence. This procedure can eliminate host card detection issues when power ramp up duration is too long, or when a system warm reboot fails.
FSC-BT825 After main 3.3V ramp up and 1.2V ramp up, the power management unit is enabled by the power ready detection circuit. The power management unit enable s the Bluetooth block. The Bluetooth firmware then initializes all circuits, included the UART. In addition to waiting the Tnon_rdy time, if the host supports UART hardware flow control it can detect RTS signals and follow the formal UART flow control handshake. Tyupical Max Unit T33ramp - - No Limit ms Toff 250 500 1000 T33ramp 0.
FSC-BT825 5.2.1 PCM Format FrameSync is the synchronizing function used to control the transfer of DAC_Data and ADC_Data. A Long FrameSync indicates the start of ADC_Data at the rising edge of FrameSync, and a Short FrameSync indicates the start of ADC_Data at the falling edge of FrameSnc. Figure 7. Long FrameSync en zh en Sh om yc as Fe Figure 8. Short FrameSync Te no ch 5.2.
FSC-BT825 16-Bit Output Data with 13-Bit PCM Sample Data and Sign Extension Figure 11. ◆For 16-bit linear PCM output, 3-bit programmable audio gain value can be padded to 13-bit sample data. en Sh 16-Bit Output Data with 13-Bit PCM Sample Data and Audio Gain Figure 12. zh PCM Interface Timing en 5.2.3 om yc as Fe no ch Te gy lo td ,L o. Figure 13: PCM Interface (Long FrameSync) C 深圳市飞易通科技有限公司 www.feasycom.
FSC-BT825 en Sh Figure 14: PCM Interface (Short FrameSync) en zh Symbol Description Typ Max Unit KHz Frequency of BCLK (Master) 64 - 512 FFrameSync Frequency of Frame Sync (Master) - 8 8 FBCLK Frequency of BCLK (Slave) 64 - 512 FFrameSync Frequency of Frame Sync (Slave) - 8 - D Data Size 8 8 16 N Number of Slots Per Frame 1 1 no ch Te FBCLK om yc as Fe Min gy lo 1 KHz KHz KHz bits Slots ,L o.
FSC-BT825 TBCLKD_OUT Delay Time from BCLK High to Valid DAC_Data - - 125 TSETUPIN Set-up Time for ADC_Data Valid to BCLK Low 10 - - THOLDIN Hold Time for BCLK Low to ADC_Data Invalid 125 - - ns ns ns Table 9: PCM Interface Timing 5.2.4 PCM Interface Signal Levels en Sh The PCM signal level ranges from 1.8V to 3.3V. The host provides the power source with the targeted power level to the FSC-BT825 PCM interface. en zh om yc as Fe 6.
FSC-BT825 Temp.(0C) 40+20/-15s 2300C~2450C 2170C 1500C~1900C 90+30/-30s Figure 15 Typical Lead-free Re-flow Solder Profile en zh en Sh Time(S) as Fe om yc 2420C 2170C no ch Te gy lo td ,L o. Figure16 Typical Lead-free Re-flow C The soldering profile depends on various parameters according to the use of different solder and material. The data here is given only for guidance on solder re-flow. FSC-BT825 will withstand up to two re-flows to a maximum temperature of 245°C. 深圳市飞易通科技有限公司 www.
FSC-BT825 7. Reliability and Environmental Specification 7.1 Temperature test Put the module in demo board which uses exit power supply, power on the module and connect to mobile. Then put the demo in the ‐20℃ space for 1 hour and then move to +70℃ space within 1minute, after 1 hour move back to ‐20℃ space within1 minute. This is 1 cycle. The cycles are 32 times and the units have to pass the testing. 7.2 Vibration Test The module is being tested without package. The displacement requests 1.
FSC-BT825 8. Layout and Soldering Considerations 8.1 Soldering Recommendations FSC-BT825 is compatible with industrial standard reflow profile for Pb-free solders. The reflow profile used is dependent on the thermal mass of the entire populated PCB, heat transfer efficiency of the oven and particular type of solder paste used. Consult the datasheet of particular solder paste for profile configurations.
FSC-BT825 Following recommendations helps to avoid EMC problems arising in the design. Note that each design is unique and the following list do not consider all basic design rules such as avoiding capacitive coupling between signal lines. Following list is aimed to avoid EMC problems caused by RF part of the module. Use good consideration to avoid problems arising from digital signals in the design. Ensure that signal lines have return paths as short as possible.
(OEM) Integrator has to assure compliance of the entire end-product incl. the integrated RF Module. For 15 B (§15.107 and if applicable §15.107) compliance, the host manufacturer is required to show compliance with 15 while the module is installed and operating. Furthermore the module should be transmitting and the evaluation should confirm that the module's intentional emissions (15C) are compliant (fundamental / out-of-band). Finally the integrator has to apply the appropriate equipment authorization (e.
Module statement The single-modular transmitter is a self-contained, physically delineated, component for which compliance can be demonstrated independent of the host operating conditions, and which complies with all eight requirements of § 15.212(a)(1) as summarized below. 1) The radio elements have the radio frequency circuitry shielded. 2) The module has buffered modulation/data inputs to ensure that the device will comply with Part 15 requirements with any type of input signal.
