Data Sheet

FSC-BT825
深圳市飞易通科技有限公司 www.feasycom.com
UART Hardware Flow Control Supported
Figure 6: UART Power On Sequence with Hardware Flow Control
Symbol Description
T33ramp 3.3V Power Pre-Charge Ramp Up Duration Before Formal Power Up. We
recommend that a 3.3V power-on and then power-off sequence is executed by
the host controller before the formal power on sequence. This procedure can
eliminate host card detection issues when power ramp up duration is too long,
or when a system warm reboot fails.
Toff The duration 3.3V is cut off before formal power up.
T33ramp The 3.3V main power ramp up duration.
T12ramp The internal 1.2V ramp up duration.
TPOR The duration from when the power-on reset releases and the power
management unit executes power on tasks. A power on reset will detect both
3.3V and 1.2V power ramp up after a predetermined duration.
Tnon_rdy UART Not Ready Duration.
In this state, the FSC-BT825 will not respond to any commands.
Table 6: UART Interface Power-On Sequence
In this state, the FSC-BT825 will not respond to any
commands. divided into two phases: A
3.3V power pre-charge phase and a formal power-up phase.
During the 3.3V power pre-charge phase, the power ramp up duration is not limited. The 3.3V
power is cut off and is turned on after the Toff period. The ramp up time is specified in the
T33ramp duration.
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