Data Sheet

FSC-BT825
深圳市飞易通科技有限公司 www.feasycom.com
TBCLKD_OUT Delay Time from BCLK High to Valid
DAC_Data
- - 125
ns
TSETUPIN Set-up Time for ADC_Data Valid to BCLK
Low
10 - -
ns
THOLDIN Hold Time for BCLK Low to ADC_Data
Invalid
125 - -
ns
Table 9: PCM Interface Timing
5.2.4 PCM Interface Signal Levels
The PCM signal level ranges from 1.8V to 3.3V. The host provides the power source with
the targeted power level to the FSC-BT825 PCM interface.
6. RECOMMENDED TEMPERATURE REFLOW PROFILE
The re-flow profiles are illustrated in Figure 14 and Figure 15 below.
 Follow: IPC/JEDEC J-STD-020
C
 Condition:
 Average
ramp-up rate(217℃ to peak):1~2℃/sec max.

Prehe
at:150~200C,60~180 second
s

Temperature maintained above 217℃:60~
150 seconds

Time within 5℃ of actual peak temperature:20~40 se
c.
 Peak temperature:250+0/-5℃ or 260+0/-5℃

Ramp
-down rate:3℃/sec.m
ax.
 Time
25℃ to peak temperature:8 minutes max

Cyc
loe interval：5 minu
s
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C
o.,Ltd