FSC-BT836B FSC-BT836B Bluetooth Module Data Sheet Document Type: FSC-BT836B Document Version: V2.1 Release Date: November 16. 2019 Contact Us Shenzhen Feasycom Technology Co.,LTD Email: sales@feasycom.com Address: Room 2004-2005,20th Floor,Huichao Technology Building,Jinhai Road, Xixiang ,Baoan District,Shenzhen,518100,China. Tel: 86-755-27924639 Shenzhen Feasycom Technology Co.,LTD www.feasycom.
FSC-BT836B Release Record Version Number Revision 2.0 Revision 2.1 Release Date 2019-08-17 2019-11-16 Shenzhen Feasycom Technology Co.,LTD Comments First Release Update antenna package www.feasycom.
FSC-BT836B 1. INTRODUCTION FSC-BT836B is Feasycom’s dual-mode (BR/EDR and LE) Bluetooth 5.0 compliant module. It supports SPP, HID, GATT, ATT, and other profiles. It provides several customizable hardware interfaces such as UART, USB, PCM, I2C, AIO, PIO, etc. FSC-BT836B incorporates high-performance MCU, Bluetooth controller and chip antenna in a small package so that customers can integrate FSC-BT836B in small products.
FSC-BT836B 2. GENERAL SPECIFICATION General Specification Chip Set RTL8761 Product ID FSC-BT836B Dimension 13mm x 26.9mm x 2.4mm Bluetooth Specification Bluetooth V5.0 (Dual Mode) Power Supply 3.3 Volt DC Output Power 10 dBm (Class 1.5) Sensitivity -94.5dBm@0.1%BER Frequency Band 2.402GHz -2.480GHz ISM band Modulation GFSK, π/4-DQPSK, 8-DPSK Baseband Crystal OSC 40MHz 1600hops/sec, 1MHz channel space,79 Hopping & channels Channels(BT 5.
FSC-BT836B Temperature -20ºC to +70 ºC Humidity 10%~95% Non-Condensing Environmental RoHS Compliant Table 1 3. PHYSICAL CHARACTERISTIC Shenzhen Feasycom Technology Co.,LTD www.feasycom.
FSC-BT836B Figure 2 4. PIN DEFINITION DESCRIPTIONS 1 2 UART_TX UART_RX 3 UART_CTS 4 UART_RTS NC 5 ANT GND PIO11 PIO10 PIO9 PIO8 PIO7 36 35 34 33 32 31 30 NC PIO6 PIO5 29 28 NC PIO4 27 6 NC 7 8 25 11 RESET VDD_3V3 PIO1/USB_DP PIO0/USB_DM 24 12 13 GND GND 22 23 NC GND PIO12 PIO13 Disc/AIO1 SWDIO 26 NC SWCLK PIO3 PIO2 9 BOOT0 Tran/AIO0 10 14 15 16 17 18 19 20 21 Figure 1: FSC-BT836B PIN Diagram Pin NO.
FSC-BT836B UART clear to send active low 3 UART_CTS CMOS input Alternative Function: Programmable input/output line UART request to send active low 4 UART_RTS CMOS output Alternative Function: Programmable input/output line 5 NC 6 NC 7 NC 8 NC 9 Tran/AIO0 I/O 10 Disc/AIO1 I/O Host MCU change UART transmission mode. (Default) Alternative Function: Analogue programmable I/O line. Host MCU disconnect bluetooth. (Default). Alternative Function: Analogue programmable I/O line.
FSC-BT836B 25 PIO2 Bi-directional Programmable input/output line 26 PIO3 Bi-directional Programmable input/output line Programmable input/output line 27 PIO4 Bi-directional Alternative Function: BT Power Mode, low level in run mode, it will be set to high level when fall asleep.
FSC-BT836B UART-TX FSC-BT836B module Data from FSC-BT836B module UART-RX Host Data from Host UART-RTS FSC-BT836B module Request to send output of FSC-BT836B module UART-CTS Host Clear to send input of FSC-BT836B module Table 3 Possible UART Settings Property Possible Values BCSP-Specific Hardware Enable or Disable Baudrate 1200bps to 921Kbps Flow Control RTS/CTS or None Data bit length 8bits Parity None, Odd or Even Number of Stop Bits 1 or 2 Table 4 Default Data Format Property
FSC-BT836B and 24 or 32 bits with 16-bit or 32-bit data resolution and synchronized by a specific signal. Audio sampling frequency from 8 kHz up to 192 kHz can be set by an 8-bit programmable linear prescaler. When operating in master mode, they can output a clock for an external audio component at 256 times the sampling frequency. 5.2.1 SPI characteristics Table 6 SPI characteristics 1. Data based on characterization results, not tested in production. 2.
FSC-BT836B Figure 3: SPI timing diagram - slave mode and CPHA = 0 * 1. Measurement points are done at CMOS levels: 0.3 VDDand 0.7 VDD. Figure 4: SPI timing diagram - slave mode and CPHA = 1 Shenzhen Feasycom Technology Co.,LTD www.feasycom.
FSC-BT836B 1.Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD Figure 5: SPI timing diagram - master mode 5.2.2 I2S characteristics Shenzhen Feasycom Technology Co.,LTD www.feasycom.
FSC-BT836B 1. Data based on design simulation and/or characterization results, not tested in production. 2. Depends on fPCLK. For example, if fPCLK = 8 MHz, then TPCLK = 1/fPLCLK = 125 ns. Table 7 2 I S characteristics 1. Measurement points are done at CMOS levels: 0.3 × VDDIOx and 0.7 × VDDIOx. 2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first byte. 2 Figure 6: I S slave timing diagram (Philips protocol) Shenzhen Feasycom Technology Co.
FSC-BT836B 1. Data based on characterization results, not tested in production. 2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first byte. 2 Figure 7: I S master timing diagram (Philips protocol) 5.3 AIO , PIO lines I2C and USB Up to 19 programmable bidirectional input/output (I/O) can be used. Two general purpose analogue interface pin can be used. 2 PIO6 and PIO7 can be used as I C interface.
FSC-BT836B The FSC-BT836B embeds a full-speed USB device peripheral compliant with the USB specification version 2.0. The USB interface implements a full-speed (12 Mbit/s) function interface with added support for USB 2.0 Link Power Management. It has software-configurable endpoint setting with packet memory up-to 1 KB and suspend/resume support. 6. RECOMMENDED TEMPERATURE REFLOW PROFILE The re-flow profiles are illustrated in Figure 4 and Figure 5 below.
FSC-BT836B 2420C 2170C Figure 9: Typical Lead-free Re-flow The soldering profile depends on various parameters according to the use of different solder and material. The data here is given only for guidance on solder re-flow. FSC-BT836B will withstand up to two re-flows to a maximum temperature of 245°C. 7. Reliability and Environmental Specification 7.1 Temperature test Put the module in demo board which uses exit power supply, power on the module and connect to mobile.
FSC-BT836B 7.4 Drop test Free fall the module (condition built in a wrapper which can defend ESD) from 150cm height to cement ground, each side twice, total twelve times. The appearance will not be damaged and all functions OK. 7.5 Packaging information After unpacking, the module should be stored in environment as follows: Temperature: 25℃ ± 2℃ Humidity: <60% No acidity, sulfur or chlorine environment The module must be used in four days after unpacking. 8. Layout and Soldering Considerations 8.
FSC-BT836B The mother board should have no bare conductors or vias in this restricted area, because it is not covered by stop mask print. Also no copper (planes, traces or vias) are allowed in this area, because of mismatching the on-board antenna. Figure 6: FSC-BT836B Restricted Area Following recommendations helps to avoid EMC problems arising in the design.
FSC-BT836B Integrator is reminded to assure that these installation instructionswill not be made available to the end-user of the final host device. The final host device, into which this RF Module isintegrated" hasto be labeled with an auxiliarylabel stating the FCC IDofthe RF Module, such as "Contains FCC ID:2AMWOFSC-BT836B "This device complies with part 15 of the FCC rules.
