Data Sheet

FSC-BT836B
Shenzhen Feasycom Technology Co.,LTD www.feasycom.com
1. Data based on design simulation and/or characterization results, not tested in production.
2. Depends on fPCLK. For example, if fPCLK = 8 MHz, then TPCLK = 1/fPLCLK = 125 ns.
Table 7 I
2
S characteristics
1. Measurement points are done at CMOS levels: 0.3 × VDDIOx and 0.7 × VDDIOx.
2. LSB transmit/receive of the previously transmitted byte.
No LSB transmit/receive is sent before the first byte.
Figure 6: I
2
S slave timing diagram (Philips protocol)