Data Sheet

FSC-BT836B
Shenzhen Feasycom Technology Co.,LTD www.feasycom.com
1. Data based on characterization results, not tested in production.
2. LSB transmit/receive of the previously transmitted byte.
No LSB transmit/receive is sent before the first byte.
Figure 7: I
2
S master timing diagram (Philips protocol)
5.3 AIO , PIO lines I
2
C and USB
Up to 19 programmable bidirectional input/output (I/O) can be used.
Two general purpose analogue interface pin can be used.
PIO6 and PIO7 can be used as I
2
C interface.
Inter-Integrated Circuit Interface (I
2
C)
The I
2
C module provides an interface between the MCU and a serial I
2
C-bus. It is capable of
acting as both a master and a slave, and supports multi-master buses. Both standard-mode,
fast-mode and fastmode plus speeds are supported, allowing transmission rates all the way
from 10 kbit/s up to 1 Mbit/s. Slave arbitration and timeouts are also provided to allow
implementation of an SMBus compliant system. The interface provided to software by the I
2
C
module, allows both fine-grained control of the transmission process and close to automatic
transfers. Automatic recognition of slave addresses is provided in all energy modes.
Analog to Digital Converter (ADC)
The ADC is a Successive Approximation Register (SAR) architecture, with a resolution of up to
12 bits at up to one million samples per second. The integrated input mux can select inputs
from 4 external pins and 6 internal signals.
Universal serial bus (USB)