User's Manual
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FIBOCOM B830-GL Hardware User Manual_HP Customization Draft Version
Page 16 of 28
The B830 module should be powered through the +3.3V pins, and the power supply design is shown in
Figure 3
-
2:
Figure 3
-
2 Power Supply Design
The filter capacitor design for power supply as shown in the following table:
Pin
Pin Name
I/O
Pin Description
DC Parameter(V)
Minimum
Value
Typical
Value
Maximum
Value
2,4,70,72,74 +3.3V PI Power supply input 3.135 3.3 3.6
3.2.1 Power Supply
Recommended
capacitance
Application
Description
10uF
Voltage-stabilizing capacitors
Reduce power fluctuations of the module in
operation, requiring capacitors with low ESR.
1uF,100nF
Digital signal noise
Filter out the interference generated from the
clock and digital signals
0.1nF
500MHz~2GHz signal noise
Filter out medium/high frequency band RF
interference
10pF 2.4GHz frequency band Filter out high frequency band RF interference
The stable power supply can ensure the normal operation of B830 module; and the ripple of the power
supply should be less than 300mV in design. So the power source should be not lower than 3.135V, or the
module may shut down or reboot. The power supply limits are shown in Figure 3-3:










