User's Manual

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FIBOCOM B830-GL Hardware User Manual_HP Customization Draft Version Page 17 of 28
Figure 3
-
3 Power Supply Limit
3.2.2
GPIO Logic
level
The B830 module GPIO logic level definition as shown in the following table:
Note:
VDD is module power supply.
3.2.3
Power
Consumption
In the condition of 3.3V power supply, the B830 power consu
mption as shown in the following table:
Piezo PWM burst Piezo PWM burst
Power supply
Ripple
≤
300mV
Drop
VBAT
≥
3.135V
min:3.135V
Parameters Minimum Maximum
V
IH
0.7 x VDD VDD
V
IL
0V 0.3 x VDD
Parameter Mode Condition
Max
Current(mA)
Typical
Current(mA)
I
Deep sleep
Deep sleep Deep sleep 1 TBD
I
Idle
Idle Idle
2 TBD
I
1LE
RMS
1LE @+8dBm 100 TBD
Peak
1LE @+8dBm 150 TBD
I
2LE
RMS 2LE @+8dBm
100
TBD
Peak 2LE @+8dBm 150
TBD
I
s2
RMS
S2 @+8dBm
100
TBD
Peak
S2@+8dBm
150
TBD
I
s8
RMS
S8 @+8dBm
100
TBD
Peak
S8 @+8dBm
150
TBD