FIBOCOM SQ806-W Series Hardware Guide Version: V1.0.
Applicability Type No. Product Model Description 1 SQ806-W 1 GB +8 GB eMCP, WIFI version Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
Copyright Copyright © 2021 Fibocom Wireless Inc. All rights reserved. Without the prior written permission of the copyright holder, any company or individual is prohibited to excerpt, copy any part of or the entire document, or transmit the document in any form. Notice The document is subject to update from time to time owing to the product version upgrade or other reasons. Unless otherwise specified, the document only serves as the user guide.
Change History Version Author Reviewer Approver Date Description GaoTianhuan Tu Min He Ruzhi Li Xiyi V1.0.3 Change FTM power consumption and Chen Guojiang 2021-06-02 BLE parameters Add product model of SQ806-W-10 Standardized the document format, corrected errors found in Ma V1.0.2 Ma Menghan Luo Qin 2020-12-30 the document, including Menghan grammar, spelling, etc., and optimized the sentence structure. Supplement product Gao Tianhuan Tu Min He Ruzhi Li Xiyi V1.0.
Contents 1 2 Introduction ...................................................................................................................8 1.1 Instruction ........................................................................................................................ 8 1.2 Reference Standards ....................................................................................................... 8 1.3 Related Document ........................................................................
3.11 Motor Driver Interface .................................................................................................... 38 3.12 LCM ............................................................................................................................... 38 3.13 TP .................................................................................................................................. 40 3.14 Camera ......................................................................................
8 9 A 7.2 Operating Current .......................................................................................................... 63 7.3 Electrostatic Protection .................................................................................................. 63 Structural Specification ..............................................................................................65 8.1 Product Appearance ..........................................................................................
1 Introduction 1.1 Instruction This document describes the electrical characteristics, RF performance, structure size, application environment, etc. of SQ806-W series module (hereinafter referred to as module). With the assistance of the document and other instructions, the developers can quickly understand the hardware functions of the module and develop products. 1.2 Reference Standards This product has been designed with the following standards. IEEE Std 802.11b, IEEE Std 802.11d, IEEE Std 802.
2 Product Overview 2.1 General Description SQ806-W-00 module integrates core components such as Baseband, eMCP, PMU, etc; it supports WIFI/BT short-distance radio transmission technology. The module is embedded with Android operating system and supports various interfaces such as MIPI/USB/UART/SPI/I2C. It is the optimal solution for the core system of wireless smart products. Its corresponding network modes and frequency bands are as follows: Table 2-1 SQ806-W supported bands Mode Band WIFI 802.
Performance Description Support 2.4G and 5G WLAN wireless communication, support WLAN features 802.11a, 802.11b, 802.11g, 802.11n and 802.11ac, maximum rate up to 433Mbps Bluetooth features BT4.2 (BR/EDR + BLE) 4 Lane MIPI_DSI interface LCD interface Support maximum HD+ (1440 * 720) 60 fps Two 4 Lane MIPI_CSI interface, up to 2.
Performance Description Antenna interface WIFI/BT antenna Dimension: 40.5mm × 40.5mm × 2.8mm Physical characteristics Encapsulation: 146 LCC pins + 116 LGA pins Weight: 9.6 ± 0.1g Operating temperature: -30°C - 75°C 1) Temperature range Storage temperature: -40°C - 85°C Software update USB/OTA/SD RoHS RoHS Compliant Note: 1) When the module is operating within this temperature range, the functions of it are normal and the relevant performance meets the IEEE standard. 2.
WIFI/BT Diplexer 2.4G 5G SAW PA LPDDR3 SDRAM eMMC Power WCN VBAT VRTC AUDIO ADC PMU Control Air RESET Memory Baseband PWRKEY BATTERY Interface Multimedia 19.2M XO LCM TP CAM Connectivity I2C SPI UART SD GPIO USB VoL key Figure 2-1 Function block diagram Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
2.4 Pin Definitions 2.4.1 Pin Assignment Figure 2-2 Pin assignment Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
Note: “NC” stands for “No Connect”, that is, the pin does not have network to be connected. 2.4.
Pin Name Pin # I/O Pin Description Note LDO12_2V95 32 PO 2.95V voltage output - LDO16_2V8 152 PO 2.8V voltage output - LDO17_2V85 129 PO 2.
Pin Name Pin # I/O Pin Description Note down key by default and can be configured for low-level shutdown and restart KEY_PWR_N 114 DI Power key Low level effective KEY_RESET_N 179 DI Reset Key Low level effective KEY_CBL_PWR_N 261 DI CBL Power key Low level effective DI SD card detection SD Card Interface SD_DET 45 Low level effective by default SD_DATA3 44 I/O SD card data interface - SD_DATA2 43 I/O SD card data interface - SD_DATA1 42 I/O SD card data interface - S
Pin Name Pin # USB_DP 14 I/O Pin Description Note USB 2.0 differential data - AI/AO signal + USB_DM 13 USB 2.
Pin Name Pin # I/O Pin Description MIPI_DSI0_LN2_P 59 AO - MIPI_DSI0_LN3_N 60 AO - MIPI_DSI0_LN3_P 61 AO - LCD_RST_N 49 DO PWM 29 DO LCD reset signal Note - LCD backlight PWM control signal LCD_TE 50 LCD swipe synchronization Keep it suspending signal when not in use DI Touch Panel Interface Main touch panel TP interrupt TP_INT 30 DI signal Main touch panel TP reset TP_RST 31 DO signal Camera Interface 229 MIPI_CSI0_CLK_P Rear camera MIPI differential - AI clock si
Pin Name Pin # I/O Pin Description Note data signal + 233 MIPI_CSI0_LN2_N Rear camera MIPI differential - AI data signal 158 MIPI_CSI0_LN3_P Rear camera MIPI differential - AI data signal + 234 MIPI_CSI0_LN3_N Rear camera MIPI differential - AI data signal Rear camera main clock MCAM_MCLK 74 - DO signal MCAM_RST 79 DO Rear camera reset signal - MCAM_PWDN 80 DO Rear camera shutdown signal - MIPI_CSI1_CLK_P 64 Front camera MIPI differential AI clock signal + MIPI_CSI1_CLK_N
Pin Name Pin # I/O Pin Description 71 AI Front camera MIPI differential Note MIPI_CSI1_LN3_P data signal + 70 AI Front camera MIPI differential MIPI_CSI1_LN3_N data signal Front camera main clock SCAM_MCLK 75 - DO signal SCAM _RST 81 DO SCAM _PWDN 82 DO Front camera reset signal - Front camera shutdown - signal Depth of field camera MCLK DCAM_MCLK 238 - DO signal Depth of field camera reset DCAM _RST 237 - DO signal Depth of field camera DCAM _PWDN 236 - DO shutdown signa
Pin Name Pin # I/O Pin Description Note MIC2_P 6 AI Earphone MIC input - MIC_GND 5 - MIC ground - MIC1_P 4 AI Main MIC input - MIC_BIAS1 219 AO MIC bias 1 - MIC3_P 220 AI Secondary MIC input - MIC_BIAS2 227 AO MIC bias 2 - 77 I/O WIFI/BT antenna - ALSP_INT 107 DI Ambient light sensor interrupt - Accelerometer sensor - ACCEL_INT2 108 DI Antenna Interface ANT-WIFI/BT INT Interface interrupt 2 MAG_INT 109 DI ACCEL_INT1 110 DI Magnetic sensor interrupt -
Pin Name Pin # I/O Pin Description Note GPIO_13 102 I/O B-PD: nppukp GPIO_95 103 I/O B-PD: nppukp GPIO_94 104 I/O B-PD: nppukp GPIO_87 105 I/O B-PD: nppukp GPIO_61 106 I/O B-PD: nppukp GPIO_8 112 I/O B-PD: nppukp, Boot configuration B-PD: nppukp, Boot GPIO_9 113 I/O configuration GPIO_89 115 I/O B-PD: nppukp GPIO_62 123 I/O B-PD: nppukp GPIO_63 124 I/O B-PD: nppukp, Boot configuration GPIO_2 153 I/O B-PD: nppukp GPIO_46 159 I/O B-PD: nppukp GPIO_50 183 I/O
Pin Name Pin # I/O GPIO_90 252 I/O GPIO_106 253 I/O Pin Description Note B-PD: nppukp B-PD: nppukp, Boot configuration GPIO_104 254 I/O B-PD: nppukp NC Interface 17~26, 87, 121, 131, 151, 191, NC 194~197, 199, 204, 207, 210, 222~224, NC Keep it suspending 247~249, 255, 258, 259 Note: Note that GPIOs with Boot configuration disable hardware pull-ups. Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
3 Application Interface 3.1 Power Supply The module provides four VBAT pins for connecting to external power supply source. The input range of power is 3.5V~4.2V and the recommended value is 3.8V. The performance of the power supply such as its load capacity, ripple etc. will directly affect the operating performance and stability of the module.
Table 3-1 Power supply Parameter Minimum Value Recommended Value Maximum Value Unit VBAT (DC) 3.5 3.8 4.2 V The reference design of power supply circuit is as follows: 220uF 1uF 100nF 39pF 33pF 18pF 8.2pF 6.
3.1.2 VRTC VRTC is the power supply of the internal RTC clock of the module. When powered on VBAT pin, the VRTC pin will output voltage. When VBAT is disconnected, if the real-time clock needs to be maintained, it needs to be powered by an external power source (such as a coin battery). The VRTC parameters are as follows: Table 3-3 VRTC parameters Parameter Minimum Typical Maximum Unit VRTC output voltage 2.5 3.1 3.2 V VRTC input voltage (clock works well) 2.0 3.0 3.
Table 3-4 Power output Pin Name Programmable Range (V) Default Voltage (V) Drive Current (mA) LDO5_1V8 1.75~3.337 1.8 200 LDO6_1V8 1.75~3.337 1.8 150 LDO10_2V85 1.75~3.337 2.85 150 LDO11_SD 1.75~3.337 2.95 600 LDO12_2V95 1.75~3.337 2.95 50 LDO14_UIM1 1.75~3.337 1.8/3 55 LDO15_UIM2 1.75~3.337 1.8/3 55 LDO16_2V8 1.75~3.337 2.8 55 LDO17_2V85 1.75~3.337 2.85 450 3.2 Control Signal 3.2.
3.2.1.1 Power On After module’s VBAT pin is powered, pull down KEY_PWR_N pin 0.5s - 10s can trigger the module to power on. The keystroke power-up circuit and the OC drive power-up reference circuit are designed as follows: S1 K E Y _P W R _N 1K TVS C lose to S 1 Figure 3-4 Keystroke power-up circuit KEY_PWR_N 0.5S T 10S 100pF 10K 47K Figure 3-5 OC drive power-up circuit The power on timing is as follows: Reproduction forbidden without Fibocom Wireless Inc.
VBAT 0.5S T 10S KEY_PWR_N LDO5_1V8 Other LDOs Figure 3-6 Power on timing 3.2.1.2 Power Off Normal power off: when module is in operating mode, pull down KEY_PWR_N pin 0.6s and then release it, user interface will display selection box (select power off or restart). Force power off: pull down KEY_PWR_N pin 9s - 15s, and the module will be forced power off.
3.2.1.3 Sleep/Wake up When module is in standby mode, pull down KEY_PWR_N pin 0.1s and then release it, and the module will enter sleep mode. When module is in sleep mode, pull down KEY_PWR_N pin 0.1s and then release it, and the module can be woke up. 3.2.2 Volume Control KEY_VOL_DOWN_N pin and KEY_VOL_UP_N pin are the volume down key and volume up key; the volume key circuit design can be referred to the power-on circuit design. 3.2.3 Reset KEY_RESET_N is the reset input of the module PMIC.
C onnector M odule U S B _D M DM U S B _D P DP U S B _ID ID 100nF V BU S 1uF U S B _V B U S GND Figure 3-8 USB2.0 reference circuit design Module GPIO DC-DC VBAT Connector USB_DM DM USB_DP DP USB_ID ID 100nF VBUS 1uF USB_VBUS GND Figure 3-9 USB2.0 reference circuit design (support OTG function) Note: 1) The total component parasitic capacitance on the USB2.0 differential signal line cannot exceed 2.0pF; 2) USB_DP and USB_DM are high-speed differential signal cables.
USB_DP and USB_DM signal cables are required to be parallel and equal in length (differential cable length controlled within 2mm), while the right-angle route shall be avoided, and differential 90Ω impedance shall be controlled. USB2.0 differential signal cable is laid on the signal layer nearest to the ground, with well grounded. 3) For the reference circuit design DC-DC that supports the OTG function, please use the 5V output.
The voltage domain of each serial port is 1.8V; when communicating with other voltage domain serial ports, it is necessary to add a level-shifting chip with the following reference circuit design: Translator V D D _1V 8 VCCA VCCB 0.1uF V D D _M C U 0.1uF OE GND U A R T _TX D A1 B1 MCU_TXD U A R T _R X D A2 B2 MCU_RXD U A R T _C T S A3 B3 MCU_CTS A4 B4 U A R T _R T S MCU_RTS Figure 3-10 Level shift reference circuit 3.
Table 3-10 SD interface pin definition Pin Name Pin # I/O Description Note SD_DET 45 DI SD card detection - SD_DATA3 44 I/O SD card data interface - SD_DATA2 43 I/O SD card data interface - SD_DATA1 42 I/O SD card data interface - SD_DATA0 41 I/O SD card data interface - SD_CMD 40 I/O SD card command interface - SD_CLK 39 DO SD card clock - LDO11_SD 38 PO SD card power supply - LDO12_2V95 32 PO 2.
SD interface design consideration: 1. LDO11_SD is the SD card peripheral driving power and can provide about 800mA current. Pay attention to control the width of cable to 1mm. 2. Pull up SD_DET with LDO5_1V8 power supply. 3. SD is a high-speed digital signal cable, which needs to be shielded. 4. SD cable must be of equal length; the equivalent capacitor must be less than 2pF. 3.7 GPIO The module has rich GPIO resources and the interface level is 1.8V.
Pin Name Pin # Reset State Interrupt Function GPIO_62 123 B-PD :nppukp YES GPIO_63 124 B-PD :nppukp YES GPIO_66 206 B-PD :nppukp NO GPIO_81 202 B-PD :nppukp YES GPIO_82 203 B-PD :nppukp NO GPIO_86 187 B-PD :nppukp YES GPIO_87 105 B-PD :nppukp NO GPIO_88 205 B-PD :nppukp NO GPIO_89 115 B-PD :nppukp NO GPIO_90 252 B-PD :nppukp YES GPIO_93 190 B-PD :nppukp YES GPIO_94 104 B-PD :nppukp NO GPIO_95 103 B-PD :nppukp NO GPIO_97 97 B-PD :nppukp YES GPIO_104
3.8 I2C The module provides four I2C interfaces for TP, camera, sensor, etc. And four I2C interfaces are all open-drain outputs, when in use, please pull up to 1.8V power domain through pull-up resistors.
Table 3-13 ADC pin definition Pin Name Pin # I/O Description Note ADC 128 AI ADC detection Configurable as 0.3V~VBAT 3.
Table 3-16 LCM pin definition Pin Name Pin # I/O Description Note LDO6_1V8 125 PO LCD IO voltage - LDO17_2V85 129 PO LCD analog power VDD - MIPI_DSI0_CLK_P 53 AO Main-LCD MIPI clock+ - MIPI_DSI0_CLK_N 52 AO Main-LCD MIPI clock- - MIPI_DSI0_LN0_P 55 AI/AO Main LCD MIPI Lane 0+ - MIPI_DSI0_LN0_N 54 AI/AO Main LCD MIPI Lane 0- - MIPI_DSI0_LN1_P 57 AI/AO Main LCD MIPI Lane 1+ - MIPI_DSI0_LN1_N 56 AI/AO Main LCD MIPI Lane 1- - MIPI_DSI0_LN2_P 59 AI/AO Main LCD MIPI
Figure 3-12 LCM reference circuit 3.13 TP The module provides one I2C interface that can be used to connect the touch panel and it provides power, interrupt, reset pins.
TP reference circuit is as follows: LDO17_2V85 LDO6_1V8 10K 2.2K 2.2K TP Module VDD TP_I2C_SCL SCL TP_I2C_SDA SDA RESET TP_RST_N TP_INT_N INT 2.2uF 100nF Figure 3-13 TP reference circuit 3.14 Camera The camera interface of module is based on the MIPI_CSI standard and can support two (4 Lane + 4 Lane) or three (4 Lane + 2 Lane + 1 Lane) cameras (three by default), the maximum camera resolution is 13 MP.
Pin Name Pin # 4 Lane + 2 Lane + 1 Lane 4 Lane + 4 Lane (Default) (Configurable) I/O MIPI_CSI0_LN0_N 231 AI Rear camera MIPI Lane 0- Rear camera MIPI Lane 0- MIPI_CSI0_LN1_P 156 AI Rear camera MIPI Lane 1+ Rear camera MIPI Lane 1+ MIPI_CSI0_LN1_N 232 AI Rear camera MIPI Lane 1- Rear camera MIPI Lane 1- MIPI_CSI0_LN2_P 157 AI Rear camera MIPI Lane 2+ Rear camera MIPI Lane 2+ MIPI_CSI0_LN2_N 233 AI Rear camera MIPI Lane 2- Rear camera MIPI Lane 2- MIPI_CSI0_LN3_P 158 AI Rear
Pin Name Pin # 4 Lane + 2 Lane + 1 Lane 4 Lane + 4 Lane (Default) (Configurable) I/O Clock - SCAM_MCLK 75 DO Front camera master clock Front camera master clock SCAM_RST 81 DO Front camera reset signal Front camera reset signal Front camera power down Front camera power down SCAM_PWDN 82 DO signal signal Front /Depth of field camera CAM2_I2C_SCL1 239 OD Front Camera I2C clock signal I2C clock signal Front /Depth of field camera CAM2_I2C_SDA1 240 OD Front Camera I2C data signal
3.14.1 Rear Camera Reference circuit design of rear camera is as follows: LDO10_2V85 LD O 16_2V 8 LD O 6_1V 8 V C C _1P 2 LD O 6_1V 8 DOVDD 2.2K 2.
3.14.2 Front Camera Reference circuit design of 4 Lane front camera is as follows: LD O 6_1V 8 LD O 16_2V 8 V C C _1V 2 LD O 6_1V 8 2.2K 2.
Reference circuit design of 2 Lane front camera is as follows: LD O 6_1V 8 V C C _1V 2 LD O 16_2V 8 LD O 6_1V 8 2.2K 2.
3.14.4 MIPI Design Considerations 1. MIPI is a high-speed signal cable. It is recommended to connect the common mode inductor in series near the camera connector to reduce the electromagnetic interference of the circuit; 2. MIPI routing is recommended to be in the inner layer, with three-dimensional grounding; 3. The MIPI signal needs to be controlled with a differential impedance of 100Ω and with an error of ±10%; 4. The total length of the cable shall not exceed 300mm; 5.
Pin Name Pin # Length (mm) MIPI_DSI0_LN2_P 59 9.99 MIPI_DSI0_LN2_N 58 10.55 MIPI_DSI0_LN3_P 61 10.43 MIPI_DSI0_LN3_N 60 10.67 MIPI_CSI0_CLK_P 229 19.21 MIPI_CSI0_CLK_N 230 19.62 MIPI_CSI0_LN0_P 155 19.62 MIPI_CSI0_LN0_N 231 19.20 MIPI_CSI0_LN1_P 156 18.12 MIPI_CSI0_LN1_N 232 18.81 MIPI_CSI0_LN2_P 157 18.92 MIPI_CSI0_LN2_N 233 19.05 MIPI_CSI0_LN3_P 158 19.17 MIPI_CSI0_LN3_N 234 19.26 MIPI_CSI1_CLK_P 64 17.79 MIPI_CSI1_CLK_N 63 17.78 MIPI_CSI1_LN0_P 66 17.
3.15 Sensor The module uses I2C to communicate with sensors on the EVK, and supports various types of sensors, such as accelerometer sensor, ambient light sensor, magnetic sensor and gyroscopes, etc.
Pin Name Pin # I/O Description Note HPH_DET 139 AI Headphone plug detection - MIC2_P 6 AI Headphone MIC input - MIC_GND 5 AI MIC ground - MIC3_P 220 AI Secondary MICinput - MIC1_P 4 AI Main MICinput - MIC_BIAS1 219 AO MIC bias 1 - MIC_BIAS2 227 AO MIC bias 2 - Audio Interface Design Consideration: 1. The module has MIC bias circuit internally, and no external circuit is required. 2.
3.16.2 Microphone Circuit Design Module 100pF MIC_P 33pF 33pF MIC_M Figure 3-18 Microphone circuit design 3.16.3 Receiver Circuit Design Module 0R 100pF REC_P 0R 33pF 33pF REC_M Figure 3-19 Receiver circuit design Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
3.16.4 Headphone Interface Circuit Design Module 33pF MIC2_P HPH_L HPH_R 20K HPH_DET 0R 33pF 33pF HPH_GND Figure 3-20 Headphone interface circuit design Note: Use a bi-directional TVS tube for the ESD protection device of the headphone interface. 3.16.5 Speaker Circuit Design Module SPK_P 33pF 33pF SPK_M Figure 3-21 Speaker circuit design Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
3.17 Forced Download Interface Design The module provides KEY_FORCE_BOOT pin as an emergency download interface. Connect the KEY_FORCE_BOOT pin with LDO5_1V8 pin when powering on, and the module can enter the emergency download mode, which is used for the final processing mode when the product fails to power on or run normally. To facilitate the subsequent software upgrade and product debugging, please reserve this pin.
4 Antenna Interface The module supports WIFI/BT antenna. 4.1 WIFI/BT Antenna Microstrip cable is recommended for the WIFI/BT RF route, with insertion loss within 0.2dB and impedance at 50Ω. Table 4-1 WIFI/BT antenna interface definition Pin Name Pin # I/O Description Note ANT-WIFI/BT 77 I/O WIFI/BT antenna interface - 4.1.1 WIFI/BT Operating Frequency Table 4-2 WIFI/BT operating frequency Mode Frequency Unit 2402 - 2482 MHz 5180 - 5835 MHz 2402 - 2480 MHz WIFI BT4.2 4.1.
Module WIFI/BT_Antenna 0R ANT_WIFI/BT NC NC Figure 4-1 WIFI/BT reference circuit 4.2 Antenna Requirements The module provides WIFI/BT antenna interfaces. The antenna requirements are as follows: Table 4-3 Antenna requirements Module Antenna Requirements Standard Antenna Requirements VSWR: ≤ 2 Gain (dBi): 1 Max input power (W): 50 WIFI/BT Input impedance (Ω): 50 Polarization type: vertical direction Insertion loss: < 1dB Reproduction forbidden without Fibocom Wireless Inc.
5 RF PCB Layout Design Guide For user PCB, the characteristic impedance of all RF signal cables should be within 50Ω. In general, the impedance of the RF signal cable is determined by the dielectric constant of the material, the cable width (W), the ground clearance (S) and the height of the reference ground plane (H). PCB characteristic impedance is usually controlled using both microstrip cable and coplanar waveguide.
Figure 5-3 Four-layer PCB coplanar waveguide structure (reference ground layer 3) Figure 5-4 Four-layer PCB coplanar waveguide structure (reference ground layer 4) In the design of RF antenna interface circuit, in order to ensure good performance and reliability of the RF signal, it is recommended to observe the following design principles: The impedance simulation tool should be used to accurately control the RF signal cable at 50Ω impedance.
distance between the ground hole and the signal cable should be at least 2 times the cable width (2*W). Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
6 WIFI and Bluetooth 6.1 WIFI Overview The module supports 2.4G and 5G WLAN wireless communications and 802.11a, 802.11b, 802.11g, 802.11n, 802.11ac standards, with a maximum rate up to 433Mbps. Its characteristics are as follows: Support Wake-on-WLAN (WoWLAN) Support ad hoc mode Support WAPI Support AP mode Support Wi-Fi Direct Support MCS 0-7 for HT20 and HT40 Support MCS 0-8 for VHT20 Support MCS 0-9 for VHT40 and VHT80 6.2 WIFI Performance Test condition: VBAT: 3.
Frequency Mode Data Rate Bandwidth (MHz) TX Power (dBm) 6Mbs 20 19.0 ± 3 54Mbps 20 16.0 ± 3 MCS0 20 18.0 ± 3 MCS7 20 15.0 ± 3 MCS0 40 18.0 ± 3 MCS7 40 15.0 ± 3 MCS0 20 18.0 ± 3 MCS8 20 13.0 ± 3 MCS0 40 18.0 ± 3 MCS9 40 13.0 ± 3 MCS0 80 18.0 ± 3 MCS9 80 13.0 ± 3 802.11a 802.11n 802.11n 5G 802.11ac Table 6-2 WIFI RX sensitivity Frequency Mode Data Rate Bandwidth (MHz) Sensitivity (dBm) 1Mbps 20 -90.0 11Mbps 20 -87.0 6Mbps 20 -89.0 54Mbps 20 -73.
Frequency Mode Data Rate Bandwidth (MHz) Sensitivity (dBm) MCS7 20 -71.0 MCS0 40 -89.0 MCS7 40 -70.0 MCS0 20 -88.0 MCS8 20 -65.0 MCS0 40 -86.0 MCS9 40 -61.0 MCS0 80 -84.0 MCS9 80 -56.0 802.11ac 6.3 Bluetooth Overview The module supports BT4.2 (BR/EDR + BLE) standards. The modulation method supports GFSK, 8-DPSK and π/4-DQPSK.BR/EDR. Channel bandwidth is 1MHz and can accommodate 79 channels. The BLE channel bandwidth is 2MHz and can accommodate 40 channels.
6.4 Bluetooth Performance Test condition: VBAT: 3.8V, temperature: 25°C. Table 6-4 BT performance index Type DH-5 2-DH5 3-DH5 BLE Unit Transmitter 9±2.5 7±2.5 7±2.5 1±2.5 dBm Sensitivity -89 -88 -84 -93 dBm Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
7 Electricity, Reliability and RF Performance 7.1 Recommended Parameters Table 7-1 Recommended parameters Parameter Min Normal Max Unit VBAT 3.5 3.8 4.2 V USB_VBUS 4.75 5 5.25 V VRTC 2.0 3.0 3.25 V Operating Temperature -30 25 75 °C Storage Temperature -40 25 85 °C 7.2 Operating Current Test condition: VBAT: 3.8V, temperature: 25℃. Table 7-2 Operating current Parameter Description Condition Type Unit Ioff Power Off Power Off 25 μA 7.
electrostatic discharge or impact. Anti-static gloves should be worn during production. ESD performance parameters table (Temperature: 25°C, Humidity: 45%). Table 7-3 ESD performance Test Point Contact Discharge Air Discharge Unit VBAT, GND ±5 ± 10 KV Antenna interface ±4 ±8 KV Other interface ± 0.5 ±1 KV Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
8 Structural Specification 8.1 Product Appearance The module product appearance is shown in the following figure, and the appearance is subject to the actual product. Figure 8-1 Module product appearance 8.2 Structural Dimension The structural dimension of the module is shown in the following figure: Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
Figure 8-2 Structural dimension 8.3 Recommended PCB Soldering Pad Design For PCB soldering pad and stencil design, please refer to FIBOCOM SQ806 Series SMT Design Guide. Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
9 Production and Storage 9.1 SMT For SMT production process parameters and related requirements, please refer to FIBOCOM SQ806 Series SMT Design Guide. 9.2 Package and Storage For package and storage requirements, please refer to FIBOCOM SQ806 Series SMT Design Guide. Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
A Acronyms Table A-1 Acronyms Acronyms Definition bps Bits Per Second LED Light Emitting Diode PCB Printed Circuit Board QPSK Quadrature Phase Shift Keying RF Radio Frequency RTC Real Time Clock Rx Receive TX Transmitting Direction UART Universal Asynchronous Receiver & Transmitter Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
10 CE Conformance information The device could be used with a separation distance of 20cm to the human body. Hereby, [Fibocom Wireless Inc.] declares that the radio equipment type [SQ806-W] is in compliance with Directive 2014/53/EU. Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
11 FCC Conformance information Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in mobile applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.
Antenna Installation (1) The antenna must be installed such that 20 cm is maintained between the antenna and users, (2) The transmitter module may not be co-located with any other transmitter or antenna. (3) Only antennas of the same type and with equal or less gains as shown below may be used with this module. Other types of antennas and/or higher gain antennas may require additional authorization for operation.
- Reorient or relocate the receiving antenna. - Increase the separation between the equipment and receiver. - Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. - Consult the dealer or an experienced radio/TV technician for help. Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment.
This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20 cm between the radiator & your body. Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
12 ISED Conformance information Industry Canada Statement This device complies with Industry Canada’s licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause interference; and (2) This device must accept any interference, including interference that may cause undesired operation of the device. Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence.
As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed.
This transmitter module is authorized only for use in device where the antenna may be installed such that 20 cm may be maintained between the antenna and users. The final end product must be labeled in a visible area with the following: “Contains IC:21374-SW806W”.
