User's Manual

FLC-WFM301 Datasheet
Flaircomm Microelectronics Confidential
Operating Condition
Min
Max
Operating Temperature Range
for A and I grade
-40 º C
+85 º C
for V and C grade
-20 º C
+70 º C
Host interface I/O supply voltage (VDD_SDIO)
1.7V
3.6V
Other I/O supply voltage (VDD_PADS_PIO_0_7, VDD_AIO_PIO_8_15)
1.7V
3.3V
Linear regulator supply voltage (VREG_IN_DIG, VREG_IN_ANA)
1.45V
2.0V
Table 11: Recommended Operating Conditions
5.2.3 Current Consumption
State
Power Consumption
Continuous receive (2.4GHz OFDM)
135mA @1.8V
10mA @3.3V
276mW
Continuous transmit (2.4GHz OFDM)
160mA @1.8V
155mA @3.3V
800mW
Leakage (deep sleep, including internal sleep clock )
66μ A @1.8V
5A @3.3V
135W
Table 12: Current Consumption
5.2.4 Digital Characteristics
Digital Terminals
Min
Typical
Max
Unit
Input Voltage Levels
V
IL
input logic level low
-0.3
-
0.25VDD
V
V
IH
input logic level high
0.625VDD
-
VDD+0.3
V
Output Voltage Levels
V
OL
output logic Level low, I
OL
=8.0mA
-
-
0.4
V
V
OH
output logic Level high, I
OH
=-8.0mA
0.75VDD
-
VDD
V
Input and Tri-state Currents
Strong pull-up
-150
-40
-10
μ A
Strong pull-down
10
40
150
μ A
Weak pull-up
-5
-1.0
-0.33
μ A
Weak pull-down
0.33
1.0
5.0
μ A
C
I
Input Capacitance
1.0
-
5.0
pF
Table 13: Digital Characteristics
5.2.5 Clock Characteristics
Clock Source
Min
Typical
Max
Unit
External Clock
XTAL_IN input resistance
30
-
-
kΩ
XTAL_IN input capacitance
-
-
4
pF
Table 14: Clock Characteristics
5.2.6 Power-on Reset Characteristics
Power-on Reset
Min
Typical
Max
Unit
Reset release on VDD_DIG rising(HL)
1.030
-
1.150
V
Reset assert on VDD_DIG falling(LO)
HL-0.060
-
HL-0.045
V