User's Manual
Circuit Descriptions
3.3 Detailed Circuit Descriptions
3
3-13
the sense resistor (FLYSENSP) is compared to the IMAXFLY voltage. If the current
exceeds the set limit, FET V554 will be turned off.
Another internal current source supplies a current to R558. This resulting voltage is a
reference for the maximum allowable output voltage (VOUTHI). The -3V3A output
voltage (M3V3A) is attenuated and level shifted in the P-ASIC, and then compared to
the VOUTHI voltage. If the -3V3A voltage exceeds the set limit, FET V554 will be
turned off.
The FREQPS control signal is converted to appropriate voltage levels for the FET switch
V554 by the BOOST circuit. The voltage VBAT supplies the BOOST circuit power via
V553 and R561. The FREQPS signal is also supplied to the D-ASIC, in order to detect
if the Fly Back converter is running well.
V551 and C552 limit the voltage on the primary winding of T552 when the FET V554 is
turned of. The signal SNUB increases the FLYGATE high level to decreases ON-
resistance of V554 (less power dissipation in V554).
-30VD
+5VA
PWRONOFF
VSENS
VOUTHI
-3V3A
VCOIL
FLYGATE
FLYBOOST
REFP (1.23V)
VBAT
FLYSENSP
IMAXFLY
FREQPS
R558
SNUB
COSC
T552
V551
V553
R561
C551
C552
+3V3A
-3V3A
V561
V562
V563
V564
BOOST
CONTROL
R559
R570
R551
R553
R552
R554
POWER ASIC
C553
48 47
49
63
55
57
52
62
51
54
58
43
V554
72
Figure 3-6. Fly-Back Converter Block Diagram
Slow ADC
The Slow ADC enables the D-ASIC to measure the following signals:
BATCUR, BATVOLT, BATTEMP, BATIDENT (Battery current, - voltage, -
temperature, - type ), DACTEST-A, DACTEST-B, and DACTEST-T (test output of the
C-ASIC’s and the T-ASIC).
De-multiplexer D531 supplies one of these signals to its output, and to the input of
comparator N531 TP536). The D-ASIC supplies the selection control signals
SELMUX0-2. The Slow ADC works according to the successive approximation
principle. The D-ASIC changes the SADCLEV signal level, and thus the voltage level
on pin 3 of the comparator step wise, by changing the duty cycle of the PWM signal
SADCLEVD. The comparator output SLOWADC is monitored by the D-ASIC, who