Data Sheet
Table Of Contents
H158A-SM
FN-LINK TECHNOLOGY LIMITED Proprietary & Confidential Information
12
sequence of the SV615XP. From that point, the typical SV615XP power-on sequence is
shown below:
1. Within 1.3 millisecond, the internal power-on reset (POR) will be done. And host could
download firmware code of DPLL setting if the crystal is not default setting, 26MHz. The
internal running clock is crystal frequency.
2. After 100us of DPLL settling time, host could set internal clock to full speed and finish
all the downloading of firmware code.










