User's Manual

System Overview and Functional Block Descriptions
1322x-LPB Reference Manual, Rev. 1.1
Freescale Semiconductor 3-9
3. Turn off power and remove the jumper shorts as required.
4. The board is now ready for boot operation.
After the FLASH is erased, the module can be loaded with a new image through the UART1 port using
Test Tool. Refer to the
Test Tool User’s Guide as supplied with Test Tool in the BeeKit download.
Figure 3-10. FLASH Erase Headers
3.7 Low Power Operation
The 1322x-LPB intended to develop low power operation and applications code. It has been designed to
allow low current measurement and support MC1322x low power application needs.
NOTE
It is strongly suggested that the user review the low power considerations
described in the
MC13224/225 Reference Manual.
3.7.1 Switched VCC for Peripheral Functions
The MC1322x by default does not retain power to its GPIO pads while in low power mode (KBI signals
are the exception and do retain power). As a result, GPIO pads should not be driven high while the device
is in low power or extraneous current exist. The 1322x-LPB provides a switched VCC for devices
connected to the MC1322x while low power mode so that these devices can be disabled when appropriate.
Figure 3-11 shows the switched VCC circuit.
• A P-channel MOSFET is used as a switch to turn SW_VCC ON or OFF as required.
• The MOSFET gate is driven by signal KBI_3 which is always powered and defaults to an output
in the high state when in low power. This condition turns off SW_VCC in low power mode.
NOTE
The user must program/control GPIO25 under run (operational) mode. The
KBI pins are controlled by the CRM in low power mode; they revert to their
GPIO control during normal run mode. As a result, GPIO25 must be
programmed as an output and controlled to enable SW_VCC as appropriate
for use, or alternatively, GPIO can be programmed as the KBI function
under normal operation.
1-2 ADC2_VREFH -> "0"
3-4 ADC2_VREFL -> "1"
Recovery M ode
VCC
R104
10K
C2
100nF
TP103
R103
10K
SW_VCC
TP3
1
2
J19
HDR_1X2
1
2
J20
HDR_1X2
ADC2_VREH
ADC2_VREFL