User's Manual

System Overview and Functional Block Descriptions
1322x-LPB Reference Manual, Rev. 1.1
3-12 Freescale Semiconductor
3.8.3 ARM JTAG Debug Interface Connector
The MC1322x supports connection to a subset of the defined ARM JTAG connector. The JTAG interface
is a standard 2.54mm/0.1inch spacing, 20-pin debug interface (J1). The 20-pin connector is clearly
separated from the GPIO and UART pin headers and located at the rear side of the module. The 20-pin
connector is designated “JTAG” on the silk-screen and has Pin 1 designated for correct plug-in of the
development cable.
Table 3-1 shows the device pins that are connected to the associated JTAG header pinouts.
3.8.4 GPIO Connector
The GPIO connector (J2) is a standard 2.54mm/0.1inch spacing, 12-pin header. The connector provides
access to MCU GPIO, two timer GPIOs, two ADC inputs, UART2 port, and the I
2
C port. Power is also
provided on the connector.
• SW_VCC is the main supply voltage. Current draw should be limited to 50 mA.
• Signals SWITCH1 and SWITCH2 are in parallel with onboard switches SW1 and SW2.
• KBI signals are provided through SWITCH1 and SWITCH2 for low power control and interface
Table 3-1. ARM JTAG 20-Pin Connector Assignments (J1)
Name
1
1
NC means No Connect.
Pin # Pin # Name
VCC 1 2 VCC
NC
2
2
MC1322x does not support separate JTAG reset TRST.
34GND
TDI 5 6 GND
TMS 7 8 GND
TCK 9 10 GND
RTCK 11 12 GND
TDO 13 14 GND
RESET
3
3
VCC through a 100k-ohm pullup.
15 16 GND
NC 17 18 GND
NC 19 20 GND
Table 3-2. GPIO Connector J2 Pinouts
Pin
Number
Name Function Notes
1 UART2_RX UART2 RX data input / GPIO19 UART2 receive data input.
2 UART2_TX UART2 TX data output / GPIO18 UART2 transmit data output.
3I2C_SDA I
2
C Bus data / GPIO13 I
2
C bus signal SDA. Pull-up to SW_VCC
available