User's Manual

Interface Locations and Pinouts
1322x Sensor Node Reference Manual, Rev. 1.1
4-4 Freescale Semiconductor
4.6 Debug/Development Connector (ARM JTAG Interface)
The MC1322x supports connection to a subset of the defined ARM JTAG connector. The JTAG interface
is a standard 2.54mm/0.1inch spacing, 20-pin debug interface (J1). The 20-pin connector is clearly
separated from the GPIO pin header (J2) and located at the rear side of the module. The 20-pin connector
has Pin 1 marking for correct plug-in of the development cable.
Table 4-3 shows the device pins that are connected to the associated JTAG header pin outs if the JTAG
connector is used.
SW1 (pushbutton) KBI_4 Interrupt functionality. In parallel with SW6 (right).
SW2 (pushbutton) KBI_5 Interrupt functionality. In parallel with SW6 (down).
SW3 (pushbutton) KBI_6 Interrupt functionality. In parallel with SW6 (left).
SW4 (pushbutton) KBI_7 Interrupt functionality. In parallel with SW6 (up).
SW5 (RST) RESETB HW reset
SW6 (right) KBI_4 Interrupt functionality. In parallel with SW1.
SW6 (down) KBI_5 Interrupt functionality. In parallel with SW2.
SW6 (left) KBI_6 Interrupt functionality. In parallel with SW3.
SW6 (up) KBI_7 Interrupt functionality. In parallel with SW4.
SW6 (center) KBI_0_HST_WK Host wake up output functionality. No interrupt functionality
Table 4-3. ARM JTAG 20-Pin Connector Assignments (J1)
Name
1
1
NC means No Connect.
Pin # Pin # Name
VCC 1 2 VCC
NC
2
2
MC1322x does not support separate JATG reset TRST.
34GND
TDI 5 6 GND
TMS 7 8 GND
TCK 9 10 GND
RTCK 11 12 GND
TDO 13 14 GND
RESET
3
3
VCC through a 100k-ohm pullup.
15 16 GND
NC 17 18 GND
NC 19 20 GND
Table 4-2. Switch and LED Summary (continued)
Item GPIO Connection Feature