Integrated Microcontroller Reference Manual

Register Memory Map Quick Reference
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
A-2 Freescale Semiconductor
Table A-2. Module Memory Map Overview
Address Module Size
0x0000_0000 On-chip Flash/RAM Array 1G
IPSBAR + 0x00_0000 System Control Module 64 bytes
IPSBAR + 0x00_0040 Reserved 64 bytes
IPSBAR + 0x00_0080 Reserved 128 bytes
IPSBAR + 0x00_0100 DMA (Channel 0) 64 bytes
IPSBAR + 0x00_0110 DMA (Channel 1) 64 bytes
IPSBAR + 0x00_0120 DMA (Channel 2) 64 bytes
IPSBAR + 0x00_0130 DMA (Channel 3) 64 bytes
IPSBAR + 0x00_0140 Reserved 196 bytes
IPSBAR + 0x00_0200 UART0 64 bytes
IPSBAR + 0x00_0240 UART1 64 bytes
IPSBAR + 0x00_0280 UART2 64 bytes
IPSBAR + 0x00_02C0 Reserved 64 bytes
IPSBAR + 0x00_0300 I
2
C0 64 bytes
IPSBAR + 0x00_0340 QSPI 64 bytes
IPSBAR + 0x00_0380 I
2
C1 64 bytes
IPSBAR + 0x00_03C0 Real-Time Clock 64 bytes
IPSBAR + 0x00_0400 DMA Timer 0 64 bytes
IPSBAR + 0x00_0440 DMA Timer 1 64 bytes
IPSBAR + 0x00_0480 DMA Timer 2 64 bytes
IPSBAR + 0x00_04C0 DMA Timer 3 64 bytes
IPSBAR + 0x00_0500 Reserved 1792 bytes
IPSBAR + 0x00_0C00 Interrupt Controller 256 bytes
IPSBAR + 0x00_0D00 Reserved 256 bytes
IPSBAR + 0x00_0E00 Reserved 256 bytes
IPSBAR + 0x00_0F00 Interrupt Controller: Global Interrupt Acknowledge Registers 256 bytes
IPSBAR + 0x00_1000 Reserved 1M-6K
IPSBAR + 0x10_0000 Ports 64K
IPSBAR + 0x11_0000 Reset Controller, Chip Configuration, and Power Management 64K
IPSBAR + 0x12_0000 Clock Module 64K
IPSBAR + 0x13_0000 Edge Port 64K
IPSBAR + 0x14_0000 Backup Watchdog Timer 64K
IPSBAR + 0x15_0000 Programmable Interval Timer 0 64K
IPSBAR + 0x16_0000 Programmable Interval Timer 1 64K
IPSBAR + 0x17_0000 Reserved 64K