User manual

The 60x Bus
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 8-19
calculation state machine. Note that the address and size states are for internal use and are not transferred
on the address or TSIZ pins. Extended transactions (16- and 24-byte) are not described here but can be
determined by extending this table for 9-, 10-, 16-, 23-, and 24-byte transactions.
8.4.3.8 Extended Transfer Mode
The PowerQUICC II supports an extended transfer mode that improves bus performance. This should not
be confused with the extended bus protocol used to support direct-store operations supported in some
earlier processors that implement the PowerPC architecture. The PowerQUICC II can generate 5-, 6-, 7-,
Table 8-9. Address and Size State Calculations
Size State Address State [0–4] Port Size Next Size State Next Address State [0–4]
Byte xxxxx x Stop
2-Byte xxxx0 Byte Byte xxxx1
xx001 Byte xx010
xx101 Byte xx110
xxx01 Half Byte xx x10
xxxx0 Stop
3-Byte xx000 Byte 2-Byte xx001
xx001 2-Byte xx010
xx100 2-Byte xx101
xx101 2-Byte xx110
xx000 Half Byte xx010
xx001 2-Byte xx010
xx100 Byte xx110
xx101 2-Byte xx110
xxxxx Word Stop
4-Byte x x x 0 0 Byte 3-Byte x x x 0 1
xxx00 Half 2-Byte xxx10
xxxxx Word Stop
5-Byte xx011 Byte 4-Byte xx100
6-Byte xx010 Byte 5-Byte xx011
xx010 Half 4-Byte xx100
7-Byte xx001 Byte 6-Byte xx010
8-Byte xx000 Byte 7-Byte xx001
xx000 Half 6-Byte xx010
xx000 Word 4-Byte xx100
x x 0 0 0 Double Stop