User manual

Communications Processor Module Overview

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

14-2 Freescale Semiconductor

— Synchronous UART (1x clock mode)

— Binary synchronous communication (BISYNC)

— Totally transparent operation

• Two full-duplex serial management controllers (SMCs) support the following protocols:

— GCI (ISDN interface) monitor and C/I channels

— UART

— Transparent operation

• Serial peripheral interface (SPI) support for master or slave

•I

C bus controller

• Time-slot assigner supports multiplexing of data from any of the SCCs, FCCs, SMCs, and MCCs

onto eight time-division multiplexed (TDM) interfaces. The time-slot assigner supports the

following TDM formats:

— T1/CEPT lines

—T3/E3

— Pulse code modulation (PCM) highway interface

— ISDN primary rate

— Freescale interchip digital link (IDL)

— General circuit interface (GCI)

— User-defined interfaces

• Eight TC layers between the TDMs and FCC2 (MPC8264 and MPC8266 only)

• Eight independent baud rate generators (BRGs)

• Four general-purpose 16-bit timers or two 32-bit timers

• General-purpose parallel ports—sixteen parallel I/O lines with interrupt capability