Freescale Semiconductor, Inc. DOCUMENT NUMBER S12EETX4KV0 Freescale Semiconductor, Inc... EETX4K Block Guide V00.04 Original Release Date: 7 JUL 2003 Revised: 30 OCT 2003 Motorola, Inc. Motorola reserves the right to make changes without further notice to any products herein.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Freescale Semiconductor, Inc... Revision History 2 For More Information On This Product, Go to: www.freescale.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Table of Contents Section 1 Introduction Freescale Semiconductor, Inc... 1.1 1.1.1 1.2 1.3 1.4 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Background Debug Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 EEPROM Module Security . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Unsecuring the MCU in Special Single Chip Mode via the BDM . . . . . . . . . . . . . 40 Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Freescale Semiconductor, Inc... List of Figures Figure 1-1 Figure 3-1 Figure 3-2 Figure 3-3 Figure 3-4 Figure 3-5 Figure 3-6 Figure 3-7 Figure 3-8 Figure 3-9 Figure 3-10 Figure 3-11 Figure 3-12 Figure 3-13 Figure 4-1 Figure 4-2 Figure 4-3 Figure 4-4 Figure 4-5 Figure 4-6 Figure 4-7 Figure 4-8 Module Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 EEPROM Memory Map . . . . . . . . . . . . . .
Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... Block Guide — S12EETX4KV0 V00.04 6 For More Information On This Product, Go to: www.freescale.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 List of Tables EEPROM Configuration Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 EEPROM Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 EEPROM Protection Address Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Valid EEPROM Command List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... Block Guide — S12EETX4KV0 V00.04 10 For More Information On This Product, Go to: www.freescale.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Section 1 Introduction 1.1 Overview Freescale Semiconductor, Inc... This document describes the EETX4K module which includes a 4K byte EEPROM (Non-Volatile) memory. The EEPROM memory may be read as either bytes, aligned words or misaligned words. Read access time is one bus cycle for bytes and aligned words, and two bus cycles for misaligned words.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 1.4 Block Diagram A block diagram of the EEPROM module is shown in Figure 1-1. EETX4K Freescale Semiconductor, Inc... Command Interrupt Request EEPROM Interface Command Pipeline EEPROM cmd2 addr2 data2 cmd1 addr1 data1 2K * 16 Bits Registers sector 0 sector 1 Protection sector 1023 Oscillator Clock Clock Divider EECLK Figure 1-1 Module Block Diagram 12 For More Information On This Product, Go to: www.freescale.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Section 2 External Signal Description 2.1 Overview Freescale Semiconductor, Inc... The EEPROM module contains no signals that connect off-chip. 13 For More Information On This Product, Go to: www.freescale.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Section 3 Memory Map and Registers 3.1 Overview This section describes the memory map and registers for the EEPROM module. Freescale Semiconductor, Inc... 3.2 Module Memory Map A linear EEPROM memory map is shown in Figure 3-1.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 ADDRESS OFFSET = $_00 EEPROM Registers 12 bytes ADDRESS OFFSET = $_0B Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 The EEPROM module also contains a set of 12 control and status registers located between EEPROM register address offsets $_00 and $_0B. A summary of the EEPROM module registers is given in Table 3-2 while their accessibility is detailed in section 3.3. Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 3.3 Register Descriptions 3.3.1 ECLKDIV — EEPROM Clock Divider Register The ECLKDIV register is used to control timed events in program and erase algorithms. Address Offset: $_00 7 R W RESET: EDIVLD 6 5 4 3 2 1 0 PRDIV8 EDIV5 EDIV4 EDIV3 EDIV2 EDIV1 EDIV0 0 0 0 0 0 0 0 0 Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 3.3.3 RESERVED2 This register is reserved for factory testing and is not accessible. Address Offset: $_02 R W Reset: 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 = Unimplemented or Reserved Freescale Semiconductor, Inc... Figure 3-4 RESERVED2 All bits read zero and are not writable. 3.3.4 ECNFG — EEPROM Configuration Register The ECNFG register enables the EEPROM interrupts.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 3.3.5 EPROT — EEPROM Protection Register The EPROT register defines which EEPROM sectors are protected against program or erase operations. Address Offset: $_04 7 R W EPOPEN Reset: F 6 RNV6 5 RNV5 4 RNV4 F F F 3 2 1 0 EPDIS EPS2 EPS1 EPS0 F F F F = Unimplemented or Reserved Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Freescale Semiconductor, Inc... Table 3-3 EEPROM Protection Address Range EPS[2:0] Address Offset Range Protected Size 000 $_FC0-$_FFF 64 bytes 001 $_F80-$_FFF 128 bytes 010 $_F40-$_FFF 192 bytes 011 $_F00-$_FFF 256 bytes 100 $_EC0-$_FFF 320 bytes 101 $_E80-$_FFF 384 bytes 110 $_E40-$_FFF 448 bytes 111 $_E00-$_FFF 512 bytes 3.3.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Freescale Semiconductor, Inc... The CCIF flag indicates that there are no more commands pending. The CCIF flag is cleared when CBEIF is clear and sets automatically upon completion of all active and pending commands. The CCIF flag does not set when an active commands completes and a pending command is fetched from the command buffer. Writing to the CCIF flag has no effect on CCIF.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Address Offset: $_06 R W Reset: 7 0 6 0 0 5 4 3 2 1 0 0 0 0 CMDB 0 0 0 = Unimplemented or Reserved Figure 3-8 EEPROM Command Register (ECMD) Freescale Semiconductor, Inc... All CMDB bits are readable and writable during a command write sequence while bit 7 reads zero and is not writable. CMDB[6:0] — Valid EEPROM commands are shown in Table 3-4.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 3.3.9 EADDR — EEPROM Address Registers The EADDRHI and EADDRLO registers are the EEPROM address registers. Address Offset: $_08 R W Reset: 7 0 6 0 5 4 3 0 0 0 0 0 0 0 0 2 1 EABHI 0 0 0 0 = Unimplemented or Reserved Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Address Offset: $_0B 7 6 5 4 R W Reset: 3 2 1 0 0 0 0 0 EDLO 0 0 0 0 = Unimplemented or Reserved Figure 3-13 EEPROM Data Low Register (EDATALO) All EDHI and EDLO bits read zero and are not writable in normal modes. Freescale Semiconductor, Inc... All EDHI and EDLO bits are readable and writable in special modes. 24 For More Information On This Product, Go to: www.freescale.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Section 4 Functional Description 4.1 EEPROM Command Operations Freescale Semiconductor, Inc... Write and read operations are both used for the program, erase, erase verify, sector erase abort, and sector modify algorithms described in this section. The program, erase, and sector modify algorithms are controlled by a state machine whose timebase, EECLK, is derived from the oscillator clock via a programmable divider.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 then 182kHz. In this case, the EEPROM program and erase algorithm timings are increased over the optimum target by: Freescale Semiconductor, Inc... ( 200 – 182 ) ⁄ 200 × 100 = 9% NOTE: "4"Program and erase command execution time will increase proportionally with the period of EECLK.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 START Tbus < 1µs? no ALL COMMANDS IMPOSSIBLE yes PRDIV8=0 (reset) Freescale Semiconductor, Inc... oscillator_clock 12.8MHz? no yes PRDIV8=1 PRDCLK=oscillator_clock/8 PRDCLK=oscillator_clock PRDCLK[MHz]*(5+Tbus[µs]) an integer? yes no EDIV[5:0]=INT(PRDCLK[MHz]*(5+Tbus[µs])) EDIV[5:0]=PRDCLK[MHz]*(5+Tbus[µs])-1 TRY TO DECREASE Tbus EECLK=(PRDCLK)/(1+EDIV[5:0]) 1/EECLK[MHz] + Tbus[µs] > 5 AND EECLK > 0.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 4.1.2 Command Write Sequence The EEPROM command controller is used to supervise the command write sequence to execute program, erase, erase verify, sector erase abort, and sector modify algorithms. Before starting a command write sequence, the ACCERR and PVIOL flags in the ESTAT register must be clear (see section 3.3.6) and the CBEIF flag should be tested to determine the state of the address, data and command buffers.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Freescale Semiconductor, Inc... Table 4-1 EEPROM Command Description ECMDB Command Function on EEPROM Memory $20 Program Program a word (two bytes) in the EEPROM block. $40 Sector Erase Erase all four memory bytes in a sector of the EEPROM block. $41 Mass Erase Erase all memory bytes in the EEPROM block.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 START Read: ECLKDIV register Clock Register Written Check EDIVLD Set? yes NOTE: ECLKDIV needs to be set once after each reset. no Write: ECLKDIV register Read: ESTAT register Address, Data, Command Buffer Empty Check CBEIF Set? no Freescale Semiconductor, Inc... yes ACCERR/ PVIOL Set? no Access Error and Protection Violation Check yes Write: ESTAT register Clear ACCERR/PVIOL $30 1. Write: EEPROM Address and Dummy Data 2.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 2. Write the program command, $20, to the ECMD register. 3. Clear the CBEIF flag in the ESTAT register by writing a “1” to CBEIF to launch the program command. Freescale Semiconductor, Inc... If a word to be programmed is in a protected area of the EEPROM memory, the PVIOL flag in the ESTAT register will set and the program command will not launch.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 START Read: ECLKDIV register Clock Register Written Check EDIVLD Set? yes NOTE: ECLKDIV needs to be set once after each reset. no Write: ECLKDIV register Read: ESTAT register Freescale Semiconductor, Inc... Address, Data, Command Buffer Empty Check CBEIF Set? no yes ACCERR/ PVIOL Set? no Access Error and Protection Violation Check yes Write: ESTAT register Clear ACCERR/PVIOL $30 1. Write: EEPROM Address and program Data 2.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 An example flow to execute the sector erase operation is shown in Figure 4-4. The sector erase command write sequence is as follows: 1. Write to an EEPROM memory address to start the command write sequence for the sector erase command. The EEPROM address written determines the sector to be erased while global address bits [1:0] and the data written are ignored. 2. Write the sector erase command, $40, to the ECMD register.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 START Read: ECLKDIV register Clock Register Written Check EDIVLD Set? yes NOTE: ECLKDIV needs to be set once after each reset. no Write: ECLKDIV register Read: ESTAT register Freescale Semiconductor, Inc... Address, Data, Command Buffer Empty Check CBEIF Set? no yes ACCERR/ PVIOL Set? no Access Error and Protection Violation Check yes Write: ESTAT register Clear ACCERR/PVIOL $30 1.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 If the EEPROM memory to be erased contains any protected area, the PVIOL flag in the ESTAT register will set and the mass erase command will not launch. Once the mass erase command has successfully launched, the CCIF flag in the ESTAT register will set after the mass erase operation has completed unless a new command write sequence has been buffered.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 1. Write to any EEPROM memory address to start the command write sequence for the sector erase abort command. The address and data written are ignored. 2. Write the sector erase abort command, $47, to the ECMD register. Freescale Semiconductor, Inc... 3. Clear the CBEIF flag in the ESTAT register by writing a “1” to CBEIF to launch the sector erase abort command.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Execute Sector Erase/Modify Command Flow Read: ESTAT register Bit Polling for Command Completion Check CCIF Set? Erase Abort Needed? no yes Freescale Semiconductor, Inc... Sector Erase Completed no yes EXIT 1. Write: Dummy EEPROM Address and Dummy Data NOTE: command write sequence aborted by writing $00 to 2. ESTAT register. Write: ECMD register Sector Erase Abort Cmd $47 NOTE: command write sequence aborted by writing $00 to 3.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 2. Write the sector modify command, $60, to the ECMD register. 3. Clear the CBEIF flag in the ESTAT register by writing a “1” to CBEIF to launch the sector erase command. If an EEPROM sector to be modified is in a protected area of the EEPROM memory, the PVIOL flag in the ESTAT register will set and the sector modify command will not launch.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 1. Writing to an EEPROM address before initializing the ECLKDIV register. 2. Writing a byte or misaligned word to a valid EEPROM address. 3. Starting a command write sequence while a sector erase abort operation is active. 4. Writing to any EEPROM register other than ECMD after writing to an EEPROM address. 5. Writing a second command to the ECMD register in the same command write sequence. 6. Writing an invalid command to the ECMD register. 7.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 4.2 Wait Mode If a command is active (CCIF=0) when the MCU enters the WAIT mode, the active command and any buffered command will be completed. The EEPROM module can recover the MCU from WAIT if the CBEIF and CCIF interrupts are enabled (see section 4.7). Freescale Semiconductor, Inc... 4.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 BDM status register. This BDM action will cause the MCU to override the Flash security state and the MCU will be unsecured. Once the MCU is unsecured, BDM commands will be enabled and the Flash security byte may be programmed to the unsecure state. 4.6 Resets 4.6.1 EEPROM Reset Sequence On each reset, the EEPROM module executes a reset sequence to hold CPU activity while loading the EPROT register from the EEPROM memory according to Table 3-1.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 CBEIF CBEIE EEPROM Command Interrupt Request Freescale Semiconductor, Inc... CCIF CCIE Figure 4-8 EEPROM Interrupt Implementation For a detailed description of the register bits, refer to the EEPROM Configuration register and EEPROM Status register sections (see sections 3.3.4 and 3.3.6 respectively). 42 For More Information On This Product, Go to: www.freescale.
Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Index –S– Security 40 Stop Mode 40 –W– –A– Wait Mode 40 ACCERR 21 –B– Background Debug Mode 40 BLANK 21 Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Freescale Semiconductor, Inc... Block Guide End Sheet 45 For More Information On This Product, Go to: www.freescale.
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