User's Guide
Table Of Contents
- About This Book
- 1 Introduction
- 2 MPC837xE-RDS Board
- 2.1 Board-Level Functions
- 2.1.1 Reset and Reset Configurations
- 2.1.2 External Interrupts
- 2.1.3 Clock Distribution
- 2.1.4 DDR2 SDRAM Controller
- 2.1.5 Local Bus Controller
- 2.1.6 Flash Memory
- 2.1.7 I2C
- 2.1.8 SATA Controller
- 2.1.9 PCI Express Interface (PCI-E & Mini PCI-E)
- 2.1.10 10/100/1000 BaseT Interface
- 2.1.11 RS-232 Port
- 2.1.12 USB 2.0 Interface
- 2.1.13 PCI Subsystem
- 2.1.14 COP/JTAG Port
- 2.2 MPC837xE-RDS Assembly
- 2.3 Connectors
- 2.4 LEDs
- 2.5 MPC837xE-RDS Board Configuration
- 2.6 Specifications
- 2.7 Mechanical Data
- 2.1 Board-Level Functions
- 3 Board Bootup
- 4 MPC837xE-RDS Software
- 5 Unit Assembly
- MPC837xE-RDS
MPC837xE-RDS, Rev. 1.0
18 Freescale Semiconductor
Preliminary, Subject to Change without Notice
MPC837xE-RDS Board
USB3300 PHY connects to a Type A receptacle connector that serves as a host interface. Figure 10 shows
the connection of USB.
Figure 10. USB Port Connections
2.1.13 PCI Subsystem
The MPC837xE has PCI interfaces. It connects to two 32-bit 3.3 V mini PCI slots, as shown in Figure 11.
Figure 11. PCI Subsystem
2.1.14 COP/JTAG Port
The common on-chip processor (COP) is part of the MPC837xE JTAG module and is implemented as a
set of additional instructions and logic. This port can connect to a dedicated emulator for extensive system
debugging. Several third-party emulators in the market can connect to the host computer through the
MPC837xE
ULPI_D[7:0]
ULPI_STP
ULPI_NXT
ULPI_CLK
DIR
USB3300
D[7:0]
STP
NXT
CLKOUT
ULPI_DIR
VBUS
DM
ID
5V
DP
USB_TYPE_A_RECEPTACLE
MPC837xE
32-Bit PCI
PCI-AD[0:31]
PCI-CBE
[0:3]
PCI-REQ0
PCI-GNT0
PCI-CTRL
32-Bit 3.3 V
Mini PCI Slot
32-Bit 3.3 V
Mini PCI Slot
PCI-REQ1
PCI-GNT1
AD15
AD14